SCPS301 September   2024 TPLD801-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1Features
  3. 2Applications
  4. 3Description
  5. 4Pin Configuration and Functions
  6. 5Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Supply Current Characteristics
    7. 5.7 Switching Characteristics
  7. 6Parameter Measurement Information
  8. 7Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 I/O Pins
      2. 7.3.2 Connection Mux
      3. 7.3.3 Configurable Use Logic Blocks
        1. 7.3.3.1 2-Bit LUT macro-cell
        2. 7.3.3.2 3-Bit LUT macro-cell
        3. 7.3.3.3 2-Bit LUT or D Flip-Flop/Latch macro-cell
        4. 7.3.3.4 3-Bit LUT or D Flip-Flop/Latch with Set/Reset macro-cell
        5. 7.3.3.5 3-Bit LUT or Pipe Delay macro-cell
        6. 7.3.3.6 4-Bit LUT or 8-Bit Counter/Delay macro-cell
      4. 7.3.4 8-Bit Counters and Delay Generators (CNT/DLY)
        1. 7.3.4.1 Delay Mode
        2. 7.3.4.2 Reset Counter Mode
      5. 7.3.5 Programmable Deglitch Filter or Edge Detector Macro-cell
      6. 7.3.6 Selectable Frequency Oscillator
    4. 7.4 Device Functional Modes
      1. 7.4.1 Power-On Reset
    5. 7.5 Programming
      1. 7.5.1 One-Time Programmable Memory (OTP)
  9. 8Revision History
  10. 9Mechanical, Packaging, and Orderable Information
    1. 9.1 Packaging Option Addendum
    2. 9.2 Tape and Reel Information
    3. 9.3 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

1 Features

  • Operating characteristics

    • Extended temperature range: -40°C to 125°C

    • Wide supply voltage range: 1.65V to 5.5V

    • Qualified for automotive applications

  • Configurable macro-cells

    • 2-, 3-, and 4-bit lookup tables

    • D-type flip-flops and latches with and without reset/set option

    • 8-bit pipe delay

    • Counters and delay generator

    • Programmable deglitch filter or edge detector

    • Oscillator

  • Flexible digital I/O features

    • All digital signals can be routed to any GPIO

    • Digital input modes: digital in with and without Schmitt-trigger, low-voltage digital in

    • Digital output modes: push-pull, open-drain NMOS, tri-state

  • Development tools

    • InterConnect Studio

    • TPLD801-Q1 evaluation module

    • TPLD programming board