SCPS301 September 2024 TPLD801-Q1
ADVANCE INFORMATION
This macro-cell can serve as either a 4-bit LUT or as a counter/delay generator (CNT/DLY).
When used to implement LUT functions, the 4-bit LUT takes in four input signals from the connection mux and produces a single output, which goes back into the connection mux. This LUT can be configured to any 4-input user defined function, including the following standard digital logic functions: AND, NAND, OR, NOR, XOR, XNOR, INV.
Table 7-11 shows the truth table for a 4-bit LUT.
IN3 | IN2 | IN1 | IN0 | OUT |
---|---|---|---|---|
0 | 0 | 0 | 0 | User defined |
0 | 0 | 0 | 1 | |
0 | 0 | 1 | 0 | |
0 | 0 | 1 | 1 | |
0 | 1 | 0 | 0 | |
0 | 1 | 0 | 1 | |
0 | 1 | 1 | 0 | |
0 | 1 | 1 | 1 | |
1 | 0 | 0 | 0 | |
1 | 0 | 0 | 1 | |
1 | 0 | 1 | 0 | |
1 | 0 | 1 | 1 | |
1 | 1 | 0 | 0 | |
1 | 1 | 0 | 1 | |
1 | 1 | 1 | 0 | |
1 | 1 | 1 | 1 |
Each 4-bit LUT has 16 bits in the OTP to define their output function.
When used to implement 8-bit counter/delay function, the two input signals from the connection mux go to the clock (CLK) and reset (RST/DLY IN) for the counter/delay macro-cell, with the output going back to the connection mux. As a counter, the macro-cell counts to the given data value and generates a pulse when it reaches the set value or is reset. As a delay, it postpones rising and/or falling edges for the duration that is a function of the register value.
For more information on CNT/DLY macro-cell, see Section 7.3.4.