SLUSEZ2A October   2023  – December 2024 TPS1210-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Charge Pump and Gate Driver Output (VS, G1PU, G1PD, G2, BST, SRC)
      2. 8.3.2 Capacitive Load Driving Using FET Gate (G1PU, G1PD) Slew Rate Control
      3. 8.3.3 Short-Circuit Protection
        1. 8.3.3.1 Short-Circuit Protection With Auto-Retry
        2. 8.3.3.2 Short-Circuit Protection With Latch-Off
      4. 8.3.4 Undervoltage Protection (UVLO)
      5. 8.3.5 Reverse Polarity Protection
      6. 8.3.6 Short-Circuit Protection Diagnosis (SCP_TEST)
      7. 8.3.7 TPS1210x-Q1 as a Simple Gate Driver
    4. 8.4 Device Functional Modes
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application: Circuit Breaker in Battery Management System (BMS) using Low Side Current Sense
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Receiving Notification of Documentation Updates
    2. 10.2 Support Resources
    3. 10.3 Trademarks
    4. 10.4 Electrostatic Discharge Caution
    5. 10.5 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • DGX|19
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

TJ = –40 ℃ to +125℃. V(VS) = 12 V, V(BST – SRC) = 11 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE
VS Operating input voltage 3.5 40 V
V(S_PORR) Input supply  POR threshold, rising 1.85 2.55 3.3 V
V(S_PORF) Input supply POR threshold, falling 1.71 2.33 3.05 V
I(Q) Total System Quiescent current, I(GND) V(EN/UVLO) = 2 V 35 45 µA
Total System Quiescent current, I(GND)   V(EN/UVLO) =  2 V, –40°C ≤ TJ ≤ +85°C 44 µA
I(SHDN) SHDN current, I(GND) V(EN/UVLO) = 0 V, V(SRC) = 0 V 0.86 3.3 µA
I(REV) I(VS) leakage current during Reverse Polarity  V(VS) = – 40 V 11 13 23 µA
ENABLE, UNDERVOLTAGE LOCKOUT (EN/UVLO), SHORT CIRCUIT COMPARATOR TEST (SCP_TEST) INPUT
V(UVLOR) UVLO threshold voltage, rising 1.176 1.23 1.287 V
V(UVLOF) UVLO threshold voltage, falling 1.09 1.138 1.184 V
V(ENR) Enable threshold voltage for low Iq shutdown, rising 1 V
V(ENF) Enable threshold voltage for low Iq shutdown, falling 0.3 V
I(EN/UVLO) Enable input leakage current V(EN/UVLO)  = 12 V 170 310 nA
V(SCP_TEST_H) SCP test mode rising threshold 2 V
V(SCP_TEST_L) SCP test mode falling threshold 0.8 V
I(SCP_TEST) SCP_TEST input leakage current 90 700 nA
CHARGE PUMP (BST–SRC)
I(BST) Charge Pump Supply current V(BST – SRC)  = 10 V, V(EN/UVLO) =  2 V 190 345 466 µA
V(BST_UVLOR) V(BST – SRC) UVLO voltage threshold, rising V(EN/UVLO) = 2 V 8.1 9 9.9 V
V(BST_UVLOF) V(BST – SRC) UVLO voltage threshold, falling V(EN/UVLO) = 2 V 7.31 8.2 8.9 V
V(BST–SRC_ON) Charge Pump Turn ON voltage V(EN/UVLO) = 2 V 9.3 10.3 11.4 V
V(BST–SRC_OFF) Charge Pump Turn OFF voltage V(EN/UVLO) = 2 V 10.4 11.6 12.8 V
V(BST–SRC) Charge Pump Voltage at V(VS) = 3.5 V V(EN/UVLO) = 2 V 9.1 10.5 11.6 V
I(SRC) SRC pin leakage current V(EN/UVLO) =  2 V, V(INP1) = V(INP2) = 0 V 0.4 µA
GATE DRIVER OUTPUTS (G1PU, G1PD, G2)
V(G1_GOOD) G1 Good rising threshold 5.5 7 8.3 V
I(G1PU) Peak Source Current 1.69 A
I(G1PD) Peak Sink Current 2 A
I(G2) G2 Peak Source Current 1.69 A
I(G2) G2 Peak Sink Current 2 A
SHORT CIRCUIT PROTECTION (ISCP)
ISCP SCP Input Bias current 8.4 10 12.33 µA
V(SCP) SCP threshold R(ISCP) =  140.5 kΩ 300 mV
R(ISCP) =  28 kΩ 60 75 90.5 mV
R(ISCP) =  10.5 kΩ 32 40 48.9 mV
R(ISCP) =  500 Ω 15 20 25 mV
R(ISCP) =  Open 757 mV
V(SCP) SCP threshold with external bias voltage on ISCP pin V(ISCP) = 1.405 V 283 300 316 mV
V(ISCP) = 280 mV 68.7 75 82.5 mV
V(ISCP) = 105 mV 34.5 40 46.5 mV
DELAY TIMER (TMR)
I(TMR_SRC_CB) TMR source current 67 87 104 µA
I(TMR_SRC_FLT) TMR source current  1.4 2.73 3.8 µA
I(TMR_SNK) TMR sink  current 2.17 2.8 3.4 µA
V(TMR_SC) 0.93 1.1 1.2 V
V(TMR_LOW) 0.15 0.21 0.25 V
N(A-R Count) 32
INPUT CONTROLS (INP1, INP2), CURRENT SENSE SELECT (CS_SEL) & FAULT FLAG (FLT) 
R(FLT) FLT Pull-down resistance 53 83 107 Ω
I(FLT) FLT Input leakage current 0 V ≤ V(FLT) ≤ 20 V 410 nA
V(INP1_H),  V(INP2_H)  2 V
V(INP1_L), V(INP2_L)   0.8 V
I(INP1), I(INP2) INP Input leakage current 98 206 nA
V(CS_SEL_H)  CS_SEL threshold for low side sensing 2 V
V(CS_SEL_L)  CS_SEL threshold for high side sensing 0.8 V