SLUSFA1 September   2024 TPS1214-Q1

ADVANCE INFORMATION  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Charge Pump and Gate Driver Output (VS, GATE, BST, SRC)
      2. 8.3.2 Capacitive Load Driving
        1. 8.3.2.1 Using Low Power Bypass FET (G Drive) for Load Capacitor Charging
        2. 8.3.2.2 Using Main FET (GATE drive) Gate Slew Rate Control
      3. 8.3.3 Overcurrent and Short-Circuit Protection
        1. 8.3.3.1 I2t-Based Overcurrent Protection
          1. 8.3.3.1.1 I2t-Based Overcurrent Protection With Auto-Retry
          2. 8.3.3.1.2 I2t-Based Overcurrent Protection With Latch-Off
        2. 8.3.3.2 Short-Circuit Protection
      4. 8.3.4 Analog Current Monitor Output (IMON)
      5. 8.3.5 NTC based Temperature Sensing (TMP) and Analog Monitor Output (ITMPO)
      6. 8.3.6 Fault Indication and Diagnosis (FLT, SCP_TEST)
      7. 8.3.7 Reverse Polarity Protection
      8. 8.3.8 Undervoltage Protection (UVLO)
    4. 8.4 Device Functional Modes
      1. 8.4.1 State Diagram
      2. 8.4.2 State Transition Timing Diagram
      3. 8.4.3 Power Down
      4. 8.4.4 Shutdown Mode
      5. 8.4.5 Low Power Mode (LPM)
      6. 8.4.6 Active Mode (AM)
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application 1: Driving Power at all times (PAAT) Loads With Automatic Load Wakeup
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
    3. 9.3 Typical Application 2: Driving Power at all times (PAAT) Loads With Automatic Load Wakeup and Output Bulk Capacitor Charging
      1. 9.3.1 Design Requirements
      2. 9.3.2 External Component Selection
      3. 9.3.3 Application Curves
    4. 9.4 Power Supply Recommendations
    5. 9.5 Layout
      1. 9.5.1 Layout Guidelines
      2. 9.5.2 Layout Example
  11. 10Device and Documentation Support
    1. 10.1 Device Support
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information
    1. 12.1 Tape and Reel Information
    2. 12.2 Mechanical Data

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.5 Electrical Characteristics

TJ = –40 ℃ to +125℃. V(VS) = 12 V, V(BST – SRC) = 12 V, V(SRC) = 0 V
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
SUPPLY VOLTAGE (VS)
VS Operating input voltage 3.5 73 V
Total System Quiescent current, I(GND) V(VS) = 12 V, V(EN/UVLO) = V(LPM) = 2 V 350 µA
Total System Quiescent current, I(GND) V(VS) = 12 V, V(EN/UVLO) = V(LPM) = 2 V
TPS12142-Q1 and TPS12143-Q1 Only		 380 µA
Total System Quiescent current, I(GND) V(VS) = 12 V, V(EN/UVLO) = 2V, V(LPM) = 0 V 20 µA
Total System Quiescent current, I(GND) in SCP_TEST Diagnosis Mode V(VS) = 12 V, V(EN/UVLO) = 2V, V(LPM) = 0 V, V(SCP_TEST) = 2 V 124 µA
I(SHDN) SHDN current, I(GND) V(SRC) = 12 V, V(EN/UVLO) = 0 V, V(SRC) = 0 V 1 µA
ENABLE, UNDERVOLTAGE LOCKOUT (EN/UVLO) AND SCP_TEST
V(UVLOR) UVLO threshold voltage, rising 1.2 V
V(UVLOF) UVLO threshold voltage, falling 1.11 V
V(ENR) Enable threshold voltage for low Iq shutdown, rising 1 V
V(ENF) Enable threshold voltage for low Iq shutdown, falling 0.3 V
V(SCP_TEST_H) SCP_TEST mode rising threshold 2 V
V(SCP_TEST_L) SCP_TEST mode falling threshold 0.72 V
CHARGE PUMP (BST–SRC)
I(BST_LPM) Charge Pump Supply current in LPM V(BST – SRC)  = 10 V, V(EN/UVLO) =  2 V, V(LPM) = 0 V 320 µA
I(BST_AM) Charge Pump Supply current in active mode V(BST – SRC)  = 12 V, V(EN/UVLO) =  2 V, V(LPM) = 2 V 600 µA
V(BST UVLO) V(BST – SRC) UVLO voltage threshold, rising V(EN/UVLO) = 2 V 7.6 V
V(BST – SRC) UVLO voltage threshold, falling V(EN/UVLO) =  2 V 6.6 V
VCP(LOW_AM) Charge Pump Turn ON voltage in active mode V(EN/UVLO) = 2 V, V(LPM) = 2 V 10.4 V
VCP(HIGH_AM) Charge Pump Turnoff voltage in active mode V(EN/UVLO) = 2 V, V(LPM) = 2 V 11.4 V
VCP(LOW_LPM) Charge Pump Turn ON voltage in low power mode V(EN/UVLO) = 2 V, V(LPM) = 0 V 9.3 V
VCP(HIGH_LPM) Charge Pump Turnoff voltage in low power mode V(EN/UVLO) = 2 V, V(LPM) = 0 V 10.3 V
VCP(AM_VS_3V) Charge Pump Voltage at V(VS) = 3.5 V V(EN/UVLO) = 2 V 8 V
V(G_GOOD) G Drive Good rising threshold w.r.t BST when bypass comparator reference changes from 2 V to 200 mV 2.3 V
I(SRC) SRC pin leakage current V(EN/UVLO) =  2 V, V(INP) = 0, V(LPM) = 2 V 1 µA
GATE DRIVER OUTPUTS (GATE, G)
I(GATE) Peak Source Current 0.5 A
I(GATE) Peak Sink Current 2 A
I(G) Gate charge (sourcing) current, on state 100 µA
I(G) G Peak Sink Current 390 mA
CURRENT SENSE AND CURRENT MONITOR (CS1+, CS1–, IMON)
V(OS_SET) Input referred offset (VSNS to V(IMON) scaling) –150 150 µV
V(GE_SET) Gain error (VSNS to V(IMON) scaling) –1 1 %
V(IMON_Acc) IMON accuracy VSNS = 15 mV, RSET = 350 Ω, RIMON =  17.5 kΩ,
Gain = 90		 –2 2 %
V(IMON_Acc) IMON accuracy VSNS = 30 mV, RSET = 350 Ω, RIMON =  35 kΩ,
Gain = 90		 –2 2 %
OVERCURRENT (I2t) AND SHORT CIRCUIT PROTECTION (IOC, I2t, ISCP)
V(OCP) OCP threshold accuracy RSET = 350 Ω, V(OCP) = 15 mV, R(IOC) = 54.4 kΩ –5 5 %
V(OCP) OCP threshold accuracy RSET = 350 Ω, V(OCP) = 30 mV, R(IOC) = 13.6 kΩ –5 5 %
I2(I2t_Acc) I2 current accuracy on I2t pin RSET = 350 Ω, V(OCP) = 15 mV, R(IOC) = 54.4 kΩ –10 10 %
I2(I2t_Acc) I2 current accuracy on I2t pin RSET = 350 Ω, V(OCP) = 30 mV, R(IOC) = 13.6 kΩ –10 10 %
V(I2t_OC) I2t pin voltage threshold for overcurrent shutdown 2 V
V(I2t_OFFSET) I2t pin offset voltage 500 mV
V(REF_OC) IOC pin reference voltage 200 mV
V(SCP_Range) SCP threshold range 10 100 mV
ISCP SCP Input Bias current 25 µA
LOAD WAKEUP COMPARATOR (CS2+, CS2-)
V(LPM_SCP) Short-circuit threshold in LPM 2 V
V(LWU) Load wakeup current threshold 200 mV
AUTO-RETRY OR LATCH-OFF TIMER (TMR)
I(TMR_SRC) TMR source current  2.5 µA
I(TMR_SINK) TMR sink  current 2.5 µA
V(TMR_HIGH) Voltage at TMR pin for AR counter rising threshold 1.23 V
V(TMR_LOW) Voltage at TMR pin for AR counter falling threshold 0.21 V
N(A-R Count) 32
TEMPERATURE MONITOR (CS1–, TMP, ITMPO)
V(REF_TMP) Temperature amplifier internal reference voltage 500 mV
INPUT CONTROLS (INP, LPM), & FAULT FLAG (FLT)
R(FLT), R(WAKE) FLT, WAKE Pull-down resistance 70 Ω
I(FLT), I(WAKE) FLT leakage current 0 V ≤ V(FLT) ≤ 20 V, 
0 V ≤ V(WAKE) ≤ 20 V		 360 nA
V(INP_H), V(LPM_H) 2 V
V(INP_L), V(LPM_L) 0.72 V
V(INP_Hys), V(LPM_Hys) INP, LPM Hysteresis 400 mV
I(INP), I(LPM)  INP, LPM leakage current 170 nA