SLVSGF4B june 2022 – may 2023 TPS1641
PRODUCTION DATA
The TPS1641x implements overvoltage protection to protect the load from input overvoltage conditions. A resistor divider can be connected from the IN pin of device to configure the overvoltage protection setpoint. The device turns off the internal FET and asserts the FLT pin as the voltage at OVP pin goes above VOVPR, and as the OVP pin voltage falls below VOVPF, the internal FET is turned ON and FLT pin is de-asserted. See the Section 7.5 table for VOVPF and VOVPR and Section 7.6 for tOVP_entry_dly and tOVP_exit_dly timings for overvoltage protection input. Figure 8-3 illustrates the OVP input in TPS1641x devices. Figure 8-4 shows the overvoltage response.
Vcc and FLT pins of the device are rated up to 60 V, and the FLT pin can be used to drive an external PFET transistor and provide protection from 60-V overvoltage at input as shown in Figure 8-5.
To disable the overvoltage input, connect OVP to GND. If the OVP pin is left open, the device turns off the internal FET.