SLVSET9F September   2018  – February 2023 TPS1663

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1  Hot Plug-In and In-Rush Current Control
        1. 9.3.1.1 Thermal Regulation Loop
      2. 9.3.2  Undervoltage Lockout (UVLO)
      3. 9.3.3  Overvoltage Protection (OVP)
      4. 9.3.4  Overload and Short Circuit Protection
        1. 9.3.4.1 Overload Protection
        2. 9.3.4.2 Short Circuit Protection
          1. 9.3.4.2.1 Start-Up With Short-Circuit On Output
      5. 9.3.5  Output Power Limiting, PLIM (TPS16632 Only)
      6. 9.3.6  Current Monitoring Output (IMON)
      7. 9.3.7  FAULT Response (FLT)
      8. 9.3.8  Power Good Output (PGOOD)
      9. 9.3.9  IN, P_IN, OUT and GND Pins
      10. 9.3.10 Thermal Shutdown
      11. 9.3.11 Low Current Shutdown Control (SHDN)
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Programming the Current-Limit Threshold R(ILIM) Selection
        2. 10.2.2.2 Undervoltage Lockout and Overvoltage Set Point
        3. 10.2.2.3 Setting Output Voltage Ramp Time (tdVdT)
          1. 10.2.2.3.1 Support Component Selections RPGOOD and C(IN)
      3. 10.2.3 Application Curves
    3. 10.3 System Examples
      1. 10.3.1 Simple 24-V Power Supply Path Protection
    4. 10.4 Power Supply Recommendations
      1. 10.4.1 Transient Protection
    5. 10.5 Layout
      1. 10.5.1 Layout Guidelines
      2. 10.5.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
      1. 11.1.1 Related Documentation
    2. 11.2 Receiving Notification of Documentation Updates
    3. 11.3 Support Resources
    4. 11.4 Trademarks
    5. 11.5 Electrostatic Discharge Caution
    6. 11.6 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Refer to the PDF data sheet for device specific package drawings

Mechanical Data (Package|Pins)
  • RGE|24
  • PWP|20
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.3.4.1 Overload Protection

The TPS1663x devices feature accurate overload current limiting and fast short circuit protection feature. If the load current exceeds the programmed current limit IOL, the device regulates the current through it at IOL eventually reducing the output voltage. The power dissipation across the device during this operation is (VIN – VOUT) × IOL and this can heat up the device and eventually enter into thermal shutdown. The maximum duration for the overcurrent through the FET is tCL_PLIM(dly), 162 msec (typical). If the thermal shutdown occurs before this time the internal FET turns OFF and the device operates either in auto-retry or latch off mode based on MODE pin configuration in Table 9-1. Set the current limit using #SLVSDG28538.

Equation 4. GUID-ECD872CB-71CB-41C2-AABF-D2D28B10738C-low.gif

where

  • I(OL) is the overload current limit in Ampere
  • R(ILIM) is the current limit resistor in kΩ

During the overload current limiting if the overload condition exists for more than tCL_PLIM_FLT(dly), 1.3 msec (typical), the FLT asserts to warn of impending turnoff of the internal FETs due to the subsequent thermal shutdown event or due to tCL_PLIM(dly) timer expiry. The FLT signal remains asserted until the fault condition is removed and the device resumes normal operation. #T5464742-8 and #T5464742-9 illustrate overload current limiting performance.

GUID-F28A4C68-3F83-4580-8C9F-068CDF152608-low.gif
VIN = 50 V MODE = GND RILIM = 18 kΩ
Figure 9-6 Overload Performance During Load Step from 140 Ω to 40 Ω
GUID-870850AA-81AB-4D26-A48C-0DBD0DAF05F1-low.gif
VIN = 50 V MODE = GND RILIM = 18 kΩ
Figure 9-7 Coming Out of Overload With Load Step from 40 Ω to 140 Ω

The TPS1663x devices features ILIM pin short and open fault detection and protection. The internal FET is turned OFF when ILIM pin is detected short or open to GND and it remains OFF till the ILIM pin fault is removed.