SLVSCM2D October   2014  – December 2019 TPS1H100-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Schematic
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1.     Pin Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements – Current Sense Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Accurate Current Sense
      2. 7.3.2 Programmable Current Limit
      3. 7.3.3 Inductive-Load Switching-Off Clamp
      4. 7.3.4 Full Protections and Diagnostics
        1. 7.3.4.1  Short-to-GND and Overload Detection
        2. 7.3.4.2  Open-Load Detection
        3. 7.3.4.3  Short-to-Battery Detection
        4. 7.3.4.4  Reverse-Polarity Detection
        5. 7.3.4.5  Thermal Protection Behavior
        6. 7.3.4.6  UVLO Protection
        7. 7.3.4.7  Loss of GND Protection
        8. 7.3.4.8  Loss of Power Supply Protection
        9. 7.3.4.9  Reverse Current Protection
        10. 7.3.4.10 Protection for MCU I/Os
      5. 7.3.5 Diagnostic Enable Function
    4. 7.4 Device Functional Modes
      1. 7.4.1 Working Mode
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Distinguishing of Different Fault Modes
        2. 8.2.2.2 AEC Q100-012 Test Grade A Certification
        3. 8.2.2.3 EMC Transient Disturbances Test
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
      1. 10.2.1 Without a GND Network
      2. 10.2.2 With a GND Network
    3. 10.3 Thermal Considerations
  11. 11Device and Documentation Support
    1. 11.1 Receiving Notification of Documentation Updates
    2. 11.2 Community Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.2.2.3 EMC Transient Disturbances Test

Due to the severe electrical conditions in the automotive environment, immunity capacity against electrical transient disturbances is required, especially for a high-side power switch, which is connected directly to the battery. Detailed test requirements are in accordance with the ISO 7637-2:2011 and ISO 16750-2:2010 standards. The TPS1H100-Q1 device is tested and certificated by a third-party organization.

Table 5. ISO 7637-2:2011(E) in 12-V System(1)(2)(3)(4)

Test Item Test Pulse Severity Level and vs Accordingly Pulse Duration (td) Minimum Number of Pulses or Test Time Burst-Cycle Pulse-Repetition Time Input Resistance (Ω) Function Performance Status Classification
Level Vs/V MIN MAX
1 III –112 2 ms 500 pulses 0.5 s e s 10 Status II
2a III 55 50 µs 500 pulses 0.2 s 5 s 2 Status II
2b IV 10 0.2 to 2 s 10 pulses 0.5 s 5 s 0 to 0.05 Status II
3a IV –220 0.1 µs 1h 90 ms 100 ms 50 Status II
3b IV 150 0.1 µs 1h 90 ms 100 ms 50 Status II
(1) Tested both under input low condition and high condition.
(2) Considering the worst test condition, it is tested without any filter capacitors in VS and VOUT.
(3) GND pin network is a 1-kΩ resistor in parallel with a diode BAS21-7-F.
(4) Status II: The function does not perform as designed during the test, but returns automatically to normal operation after the test.

Table 6. ISO 16750-2:2010(E) Load Dump Test B in 12-V System(1)(2)(3)(4)(5)

Test Item Test Pulse Severity Level and vs Accordingly Pulse Duration (td) Minimum Number of Pulses or Test Time Burst Cycle/Pulse Repetition Time Input Resistance (Ω) Function Performance Status Classification
Level Vs/V MIN (s) MAX (s)
Test B 45 40 to 400 ms 5 pulses 60 e 0.5 to 4 Status II
(1) Tested both under input low condition and high condition. [DIAG_EN, IN, and VS are all classified as inputs. Which one?
(2) Considering the worst test condition, the device is tested without any filter capacitors on VS and OUT.
(3) The GND pin network is a 1-kΩ resistor in parallel with a diode BAS21-7-F.
(4) Status II: The function does not perform as designed during the test, but returns automatically to normal operation after the test.
(5) Select a 45-V external suppressor.