SLVSGL6A July 2022 – December 2022 TPS1HC30-Q1
PRODUCTION DATA
A high-accuracy current limit allows higher reliability, which protects the power supply during short circuit or power up. Also, a current limit can save system costs by reducing PCB traces, connector size, and the capacity of the preceding power stage.
Current limit offers protection from over-stressing to the load and integrated power FET. Current limit holds the current at the set value, and pulls up the SNS pin to VSNSFH and asserts the FLT pin as diagnostic reports. The three current-limit thresholds are:
Additionally, this value can be dynamically changed by changing the resistance on the ILIM pin. This information can be seen in the Applications section.
Both the internal current limit (Ilim,nom) and external programmable current limit are always active when VBB is powered and EN is high. The lower value one (of ILIM and the external programmable current limit) is applied as the actual current limit. The typical deglitch time for the current limit to assert is 2.5 µs.
Note that if a GND network is used (which leads to the level shift between the device GND and board GND), the ILIM pin must be connected with device GND. Use Equation 2 to calculate RILIM.
For better protection from a "hot short" condition (when VBB is high, channel is on, and a short to GND happens suddenly), an overcurrent protection, OVCR, circuit is triggered that makes sure to limit the maximum current the device allows to go through. With this OVCR, the device is protected during "hot short" events.
For more information about the current limiting feature, see the Short-Circuit and Overload Protection section.
The TPS1HC30-Q1 has very tight accuracy of the current limit regulation level across the full range of currents and temperature. This accuracy is defined at several defined RILIM values, 7.15 kΩ, 25 kΩ, and 71.5 kΩ specified in the Electrical Characteristics at VDS = 3 V. However, as VDS (VBB – VOUT) increases , the current regulation value also slightly increases. Taking a typical device, at the 3 different current limits ranges specified, sweeping the VDS voltage, and plotting the regulation value gives the graphs below.
Using a point during the regulation time of each of the different RILIM settings, the graph can be normalized to the specification in the electrical characteristics of VDS = 3 V which results in graph below.
Using this figure, the current limit regulation value can be estimated for any current limit value desired based on the VDS value seen in the application. These graphs were taken on a typical device and should be used as reference when accounting for current limit tolerances. As an example see table below for regulation values based on setting the current limit close to the maximum load current. Note that RILIM tolerances are not factored into analysis below.
Max Load Current for Application | RILIM | KCL | Minimum Current Limit (at VDS = 3 V) | Short Circuit Regulation value at VBB = VDS = 18 V |
---|---|---|---|---|
1.5 A | 47.5 kΩ | 92.4 A × kΩ | 1.53 A (1.94 A -21%) | 2.5 A, +11% |
3 A | 25 kΩ | 90 A × kΩ | 3.06 A (3.6 A - 15%) | 4.6A, +13% |
6A | 11.3 kΩ | 88.2A × kΩ | 6.03 A (7.8 A - 23%) | 10.6 A, +11% |