SLVSGL4 September   2023 TPS1HTC30-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
    1. 5.1 Recommended Connections for Unused Pins
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 SNS Timing Characteristics
    7. 6.7 Switching Characteristics
    8. 6.8 Timing Diagrams
    9. 6.9 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Accurate Current Sense
      2. 8.3.2 Programmable Current Limit
        1. 8.3.2.1 Capacitive Charging
      3. 8.3.3 Inductive-Load Switching-Off Clamp
      4. 8.3.4 Inductive Load Demagnetization
      5. 8.3.5 Full Protections and Diagnostics
        1. 8.3.5.1 Short-Circuit and Overload Protection
        2. 8.3.5.2 Open-Load Detection
        3. 8.3.5.3 Thermal Protection Behavior
        4. 8.3.5.4 Overvoltage (OVP) Protection
        5. 8.3.5.5 UVLO Protection
        6. 8.3.5.6 Reverse Polarity Protection
        7. 8.3.5.7 Protection for MCU I/Os
      6. 8.3.6 Diagnostic Enable Function
    4. 8.4 Device Functional Modes
      1. 8.4.1 Working Mode
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Dynamically Changing Current Limit
      3. 9.2.3 Application Curves
    3. 9.3 Power Supply Recommendations
    4. 9.4 Layout
      1. 9.4.1 Layout Guidelines
      2. 9.4.2 Layout Example
        1. 9.4.2.1 Without a GND Network
        2. 9.4.2.2 With a GND Network
        3. 9.4.2.3 Thermal Considerations
  11. 10Device and Documentation Support
    1. 10.1 Documentation Support
      1. 10.1.1 Related Documentation
    2. 10.2 Receiving Notification of Documentation Updates
    3. 10.3 Support Resources
    4. 10.4 Trademarks
    5. 10.5 Electrostatic Discharge Caution
    6. 10.6 Glossary
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.3 Inductive-Load Switching-Off Clamp

When an inductive load is switching off, the output voltage is pulled down to negative, due to the inductance characteristics. The power FET can break down if the voltage is not clamped during the current decay period. To protect the power FET in this situation, an internal drain to gate clamp, namely the VDS,clamp is used to clamp the voltage between the drain and source of the device.

Equation 3. GUID-2B621C72-4D35-4272-9BE5-1186A4E43D94-low.gif

During the current-decay period (TDECAY), the power FET is turned on for inductive energy dissipation. Both the energy of the power supply (EBAT) and the load (ELOAD) are dissipated on the high-side power switch itself, which is called EHSD. If resistance is in series with inductance, some of the load energy is dissipated in the resistance.

Equation 4. GUID-E500EB29-17CA-45C9-BE39-516B614F2007-low.gif

From the high-side power switch view, EHSD equals the integration value during the current decay period.

Equation 5. GUID-BEEF117D-A45C-4997-AEFF-3C7CE85192CB-low.gif
Equation 6. GUID-3393E8A4-B822-45B6-A2DC-5C5D5C680444-low.gif
Equation 7. GUID-1A2E8273-909A-4AB6-ABBD-85FF348B9DB6-low.gif

When R approximately equals 0, EHSD can be given simply as:

Equation 8. GUID-B2F643D1-D6B1-4DBE-9425-F193DC679A72-low.gif
GUID-F5495619-1EA3-423A-8F3F-296909011FA1-low.svg Figure 8-4 Driving Inductive Load
GUID-20230921-SS0I-LHJ9-SXF1-TKXPJDJRCLQW-low.svg Figure 8-5 Inductive-Load Switching-Off Diagram

As discussed previously, when switching off, battery energy and load energy are dissipated on the high-side power switch, which leads to the large thermal variation. For each high-side power switch, the upper limit of the maximum safe power dissipation depends on the device intrinsic capacity, ambient temperature, and board dissipation condition.