SLVSAX6H October   2011  – December 2015 TPS2002C , TPS2003C , TPS2052C , TPS2060C , TPS2062C , TPS2062C-2 , TPS2064C , TPS2064C-2 , TPS2066C , TPS2066C-2

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: TJ = TA = 25°C
    6. 7.6 Electrical Characteristics: -40°C ≤ (TJ = TA) ≤ 125°C
    7. 7.7 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Undervoltage Lockout (UVLO)
      2. 9.3.2 Enable (ENx or ENx)
      3. 9.3.3 Deglitched Fault Reporting
      4. 9.3.4 Overcurrent Protection
      5. 9.3.5 Overtemperature Protection
      6. 9.3.6 Softstart, Reverse Blocking and Discharge Output
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Input and Output Capacitance
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
    1. 11.1 Self-Powered and Bus-Powered Hubs
    2. 11.2 Low-Power Bus-Powered and High-Power Bus-Powered Functions
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
    3. 12.3 Power Dissipation and Junction Temperature
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Community Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Configuration and Functions

DGN Package
8-Pin MSOP
Top View
TPS2052C TPS2062C TPS2062C-2 TPS2066C TPS2066C-2 TPS2060C TPS2064C TPS2064C-2 TPS2002C TPS2003C po_01_lvsax6.gif
D Package
8-Pin SOIC
Top View
TPS2052C TPS2062C TPS2062C-2 TPS2066C TPS2066C-2 TPS2060C TPS2064C TPS2064C-2 TPS2002C TPS2003C po_02_lvsax6.gif
DRC Package
10-Pin VSON
Top View
TPS2052C TPS2062C TPS2062C-2 TPS2066C TPS2066C-2 TPS2060C TPS2064C TPS2064C-2 TPS2002C TPS2003C po_03_lvsax6.gif
DRB Package
8-Pin SON
Top View
TPS2052C TPS2062C TPS2062C-2 TPS2066C TPS2066C-2 TPS2060C TPS2064C TPS2064C-2 TPS2002C TPS2003C po_04_lvsax6.gif

Pin Functions

PIN TYPE(3) DESCRIPTION
NAME MSOP SOIC VSON SON
GND 1 1 1 1 GND Ground connection
IN 2 2 2, 3 2 I Input voltage and power-switch drain; connect a 0.1 µF or greater ceramic capacitor from IN to GND close to the IC
EN1 3(1) 3(6) 4(4) — I Enable input channel 1, logic high turns on power switch
–(2) –(7) –(5) —
EN1 –(1) –(6) –(4) 3 I Enable input channel 1, logic low turns on power switch
3(2) 3(7) 4(5)
EN2 4(1) 4(6) 5(4) — I Enable input channel 2, logic high turns on power switch
–(2) –(7) –(5) —
EN2 –(1) –(6) –(4) 4 I Enable input channel 2, logic low turns on power switch
4(2) 4(7) 5(5)
FLT2 5 5 6 5 O Active-low open-drain output, asserted during overcurrent, or overtemperature conditions on channel 2
NC — — 7 — O No connect – leave floating
OUT2 6 6 8 6 O Power-switch output channel 2, connected to load
OUT1 7 7 9 7 O Power-switch output channel 1, connected to load
FLT1 8 8 10 8 O Active-low open-drain output, asserted during over-current, or overtemperature conditions on channel 1
PowerPAD™ PAD — PAD — GND Internally connected to GND; used to heat-sink the part to the circuit board traces. Connect PAD to GND plane as a heatsink.
(1) Applies to TPS2052C, TPS2066C, TPS2066C-2, TPS2064C, and TPS2064C-2
(2) Applies to TPS2062C and TPS2060C
(3) I = Input, O = Output, GND = Ground
(4) Applies to TPS2003C
(5) Applies to TPS2002C
(6) Applies to TPS2066C
(7) Applies to TPS2062C