SLVSCH2 July   2014 TPS2105-EP

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
    1. 5.1 Function Table
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 Handling Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Power Switches
        1. 7.3.1.1 N-Channel MOSFET
        2. 7.3.1.2 P-Channel MOSFET
        3. 7.3.1.3 Charge Pump
        4. 7.3.1.4 Driver
        5. 7.3.1.5 Enable
    4. 7.4 Device Functional Modes
      1. 7.4.1 Operation With EN Control
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Step-by-Step Design Procedure
        2. 8.2.2.2 Power-Supply Considerations
        3. 8.2.2.3 Switch Transition
        4. 8.2.2.4 Thermal Protection
        5. 8.2.2.5 Undervoltage Lockout
        6. 8.2.2.6 Power Dissipation and Junction Temperature
        7. 8.2.2.7 ESD Protection
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Examples
  11. 11Device and Documentation Support
    1. 11.1 Trademarks
    2. 11.2 Electrostatic Discharge Caution
    3. 11.3 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Layout

10.1 Layout Guidelines

  • The IN1 and OUT pins of the TPS2105-EP can carry up to 500 mA, so trace to these pins should have short length and wider traces to minimize the voltage drop to the load.
  • Both the IN1 and IN2 pins should be bypassed to ground with a low-ESR ceramic bypass capacitor. The typical recommended bypass capacitance is 0.22-µF ceramic capacitor.
  • A bypass capacitor and a load capacitor are needed on the output terminal.
  • TI recommends a 220-µF output load capacitor for 100-mA loads.
  • Locating the 1-µF ceramic bypass capacitor at the output can improve the immunity of the device to short-circuit transients.
  • The GND terminal should be tied to the PCB ground plane at the terminal of the DUT.

10.2 Layout Examples

layout_in_out_caps_DUT_slvsch2.gifFigure 20. Input and Output Capacitors and DUT Area
layout_en_in_out_gnd_slvsch2.gifFigure 21. Enable, Input, Output, and Ground Pins
layout_schematic_slvsch2.gifFigure 22. Schematics Diagram

Table 2. Component Descriptions

PART DESCRIPTION
C1, C2 0.22 µF, size 0805
C3 1 µF, size 0805
C4 220 µF, tantalum capacitors
U1 TPS2105MDBVREP
TP_EN, TP_IN1, TP_IN2, TP_OUT, TP_GND Test point, through hole