SLVSAY8D June   2011  – January 2016 TPS22920

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
  7. Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Switching Characteristics: VIN = 3.6 V
    7. 7.7  Switching Characteristics: VIN = 0.9 V
    8. 7.8  Typical DC Characteristics
    9. 7.9  TPS22920 Typical AC Characteristics
    10. 7.10 TPS22920L Typical AC Characteristics
  8. Parametric Measurement Information
  9. Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 ON/OFF Control
      2. 9.3.2 Output Pull-Down
    4. 9.4 Device Functional Modes
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 Input Capacitor
      2. 10.1.2 Output Capacitor
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 VIN to VOUT Voltage Drop
        2. 10.2.2.2 Managing Inrush Current
      3. 10.2.3 Application Curves
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Related Links
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

10.1 Application Information

10.1.1 Input Capacitor

To limit the voltage drop on the input supply caused by transient inrush currents when the switch turns on into a discharged load capacitor or short-circuit, a capacitor needs to be placed between VIN and GND. A 1-μF ceramic capacitor, CIN, placed close to the pins is usually sufficient. Higher values of CIN can be used to further reduce the voltage drop.

10.1.2 Output Capacitor

A CIN greater than CL is highly recommended due to the integral body diode in the NMOS switch. A CL greater than CIN can cause VOUT to exceed VIN when the system supply is removed. This could result in current flow through the body diode from VOUT to VIN. A CIN to CL ratio of 10 to 1 is recommended for minimizing VIN dip caused by inrush currents during startup.

10.2 Typical Application

TPS22920 TPS22920L typ_app_cir_lvsay8.gif Figure 43. Typical Application Circuit

10.2.1 Design Requirements

DESIGN PARAMETER EXAMPLE VALUE
VIN 3.3 V
CL 4.7 µF
Maximum Acceptable Inrush Current 40 mA

10.2.2 Detailed Design Procedure

10.2.2.1 VIN to VOUT Voltage Drop

The VIN to VOUT voltage drop in the device is determined by the RON of the device and the load current. The RON of the device depends upon the VIN condition of the device. Refer to the RON specification of the device in the Electrical Characteristics table of this datasheet. Once the RON of the device is determined based upon the VIN conditions, use Equation 1 to calculate the VIN to VOUT voltage drop:

Equation 1. ΔV = ILOAD × RON

where

  • ΔV = Voltage drop from VIN to VOUT
  • ILOAD = Load current
  • RON = On-resistance of the device for a specific VIN
  • An appropriate ILOAD must be chosen such that the IMAX specification of the device is not violated.

10.2.2.2 Managing Inrush Current

The output capacitors must be charged up from 0-V to VIN when the switch is enabled. This charge arrives in the form of inrush current. Inrush current may be calculated using the following equation:

Equation 2. TPS22920 TPS22920L inrush_eq_slvsb49.gif

where

  • C = Output capacitance
  • TPS22920 TPS22920L eq1_slvsay8.gif

The TPS22920x offers a very slow controlled rise time for minimizing inrush current. This device can be selected based upon the maximum acceptable slew rate which can be calculated using the design requirements and the inrush current equation. An output capacitance of 4.7 μF will be used since the amount of inrush increases with output capacitance:

Equation 3. TPS22920 TPS22920L eq2_slvsay8.gif
Equation 4. TPS22920 TPS22920L eq3_slvsay8.gif

A device with a slew rate less than 8.5 V/ms must be used to ensure an inrush current of less than 40 mA.

The TPS22920 has a typical rise time of 880 μs at 3.3 V. This results in a slew rate of 3.75 V/ms which meets the Design Requirements.

10.2.3 Application Curves

TPS22920 TPS22920L Inrush_4.7uF_cap.png
A.
Figure 44. TPS22920 Inrush Current With 4.7-µF Output Capacitor