SLVSBT4A May   2013  – August 2015 TPS22924D

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics: VIN = 3.6 V
    7. 6.7 Switching Characteristics: VIN = 0.9 V
    8. 6.8 Dissipation Ratings
    9. 6.9 Typical Characteristics
  7. 7 Parametric Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 ON/OFF Control
      2. 8.3.2 Output Pulldown
    4. 8.4 Device Functional Modes
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 VIN to VOUT Voltage Drop
      2. 9.1.2 Input Capacitor
      3. 9.1.3 Output Capacitor
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Managing Inrush Current
      3. 9.2.3 Application Curve
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Community Resources
    2. 12.2 Trademarks
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.

9.1 Application Information

9.1.1 VIN to VOUT Voltage Drop

The VIN to VOUT voltage drop in the device is determined by the RON of the device and the load current. The RON of the device depends upon the VIN condition of the device. Refer to the RON specification of the device in the Electrical Characteristics table of this datasheet. Once the RON of the device is determined based upon the VIN conditions, use Equation 1 to calculate the VIN to VOUT voltage drop:

Equation 1. ΔV = ILOAD × RON

where

  • ΔV = Voltage drop from VIN to VOUT
  • ILOAD = Load current
  • RON = On-resistance of the device for a specific VIN
  • An appropriate ILOAD must be chosen such that the IMAX specification of the device is not violated.

9.1.2 Input Capacitor

To limit the voltage drop on the input supply caused by transient inrush currents when the switch turns on into a discharged load capacitor or short-circuit, a capacitor needs to be placed between VIN and GND. A 1-μF ceramic capacitor, CIN, placed close to the pins is usually sufficient. Higher values of CIN can be used to further reduce the voltage drop.

9.1.3 Output Capacitor

Due to the integrated body diode in the NMOS switch, a CIN greater than CL is highly recommended. A CL greater than CIN can cause VOUT to exceed VIN when the system supply is removed. This could result in current flow through the body diode from VOUT to VIN. A CIN to CL ratio of 10 to 1 is recommended for minimizing VIN dip caused by inrush currents during startup.

9.2 Typical Application

TPS22924D Typ_App_SLVSBT4.gifFigure 27. TPS22924D Typical Application

9.2.1 Design Requirements

Table 3 shows the design requirements for this application.

Table 3. Design Parameters

DESIGN PARAMETER EXAMPLE VALUE
VIN 3.6 V
CL 100 µF
Maximum Acceptable Inrush Current 100 mA

9.2.2 Detailed Design Procedure

9.2.2.1 Managing Inrush Current

When the switch is enabled, the output capacitors must be charged up from 0 V to VIN. This charge arrives in the form of inrush current. Inrush current can be calculated using the following equation:

Equation 2. TPS22924D inrush_eq_slvsb49.gif

where

  • C = Output capacitance
  • dv = Output voltage
  • dt = Rise time

The TPS22924D offers a very slow controlled rise time for minimizing inrush current. This device can be selected based upon the maximum acceptable slew rate which can be calculated using the design requirements and the inrush current equation. An output capacitance of 100 μF will be used since the amount of inrush increases with output capacitance:

Equation 3. 100mA = 100μF × (3.6V / dt)
Equation 4. dt = 3600μs

To ensure an inrush current of less than 100 mA, a device with a rise time greater than 3600 μs must be used.

The TPS22924D has a typical rise time of 6200 μs at 3.6 V. This meets the above design requirements.

9.2.3 Application Curve

Figure 28 shows the TPS22924D turning on into a 100 μF load.

TPS22924D TPS22924D.jpgFigure 28. TPS22924D Inrush Current With a 100μF Load