SLVSBL3D November 2012 – July 2021
PRODUCTION DATA
Refer to the PDF data sheet for device specific package drawings
For best performance, all traces should be as short as possible. To be most effective, the input and output capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have on normal operation. Using wide traces for VIN, VOUT, and GND helps minimize the parasitic electrical effects along with minimizing the case to ambient thermal impedance. The ON pin cannot be left floating and must be driven either high or low for proper functionality.
Figure 11-1 shows an example of a layout.