SLVS802C August   2009  – May  2015 TPS22932B

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics
    6. 7.6  Switching Characteristics, 1.2 V
    7. 7.7  Switching Characteristics, 1.5 V
    8. 7.8  Switching Characteristics, 1.8 V
    9. 7.9  Switching Characteristics, 2.5 V
    10. 7.10 Switching Characteristics, 3 V
    11. 7.11 Switching Characteristics, 3.3 V
    12. 7.12 Typical Characteristics
  8. 8 Parameter Measurement information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Configurable Logic Function
      2. 9.3.2 Quick Output Discharge
    4. 9.4 Device Functional Modes
      1. 9.4.1 Logic Configurations
  10. 10Application and Implementation
    1. 10.1 Application Information
      1. 10.1.1 ON and OFF Control
      2. 10.1.2 Input Capacitor
      3. 10.1.3 Output Capacitor
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 VIN to VOUT Voltage Drop
        2. 10.2.2.2 Managing Inrush Current
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Community Resources
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

12 Layout

12.1 Layout Guidelines

For best performance, all traces should be as short as possible. To be most effective, the input and output capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have on normal and short-circuit operation. Using wide traces for VIN, VOUT, and GND will help minimize the parasitic electrical effects along with minimizing the case to ambient thermal impedance.

12.2 Layout Example

TPS22932B layout.gifFigure 41. Layout Example