SLVSBS6A June   2013  – January 2015 TPS22963C , TPS22964C

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Simplified Schematic
  5. 5 Revision History
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Switching Characteristics
    7. 8.7 Typical Electrical Characteristics
    8. 8.8 Typical Switching Characteristics
    9. 8.9 Typical AC Scope Captures at TA = 25ºC
  9. 9 Parametric Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1 On/Off Control
      2. 10.3.2 Quick Output Discharge
    4. 10.4 Device Functional Modes
  11. 11Application and Implementation
    1. 11.1 Application Information
      1. 11.1.1 Input Capacitor
      2. 11.1.2 Output Capacitor
      3. 11.1.3 Standby Power Reduction
      4. 11.1.4 Reverse Current Protection
      5. 11.1.5 Power Supply Sequencing Without a GPIO Input
    2. 11.2 Typical Application
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Managing Inrush Current
      3. 11.2.3 Application Curves
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
  14. 14Device and Documentation Support
    1. 14.1 Related Links
    2. 14.2 Trademarks
    3. 14.3 Electrostatic Discharge Caution
    4. 14.4 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

13 Layout

13.1 Layout Guidelines

For best performance, all traces should be as short as possible. To be most effective, the input and output capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have on normal operation. Using wide traces for VIN, VOUT and GND will help minimize the parasitic electrical effects.

For higher reliability, the maximum IC junction temperature, TJ(max), should be restricted to 125˚C under normal operating conditions. Junction temperature is directly proportional to power dissipation in the device and the two are related by Equation 4.

Equation 4. app_eq1_lvsbs6.gif

where

  • TJ = Junction temperature of the device
  • TA = Ambient temperature
  • PD = Power dissipation inside the device
  • ӨJA = Junction to ambient thermal resistance. See Thermal Information section of the datasheet. This parameter is highly dependent on board layout.

13.2 Layout Example

TPS2296364 Drawing.jpgFigure 43. Layout Example