SLVSDX2A
September 2017 – December 2017
TPS23521
PRODUCTION DATA.
1
Features
2
Applications
3
Description
Device Images
Simplified Schematic
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
6.1
Absolute Maximum Ratings
6.2
ESD Ratings
6.3
Recommended Operating Conditions
6.4
Thermal Information
6.5
Electrical Characteristics
6.6
Switching Characteristics
6.7
Typical Characteristics
7
Parameter Measurement Information
7.1
Relationship between Sense Voltage, Gate Current, and Timer
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Current Limit
8.3.1.1
Programming the CL Switch-Over Threshold
8.3.1.2
Setting Up the PROG Pin
8.3.1.3
Programming CL1
8.3.1.4
Programming CL2
8.3.2
Soft Start Disconnect
8.3.3
Timer
8.3.4
Gate 2
8.4
Device Functional Modes
8.4.1
OFF State
8.4.2
Insertion Delay State
8.4.3
Start-up State
8.4.4
Normal Operation State
9
Application and Implementation
9.1
Application Information
9.2
Typical Application
9.2.1
Design Requirements
9.2.2
Detailed Design Procedure
9.2.2.1
Selecting RSNS
9.2.2.2
Selecting Soft Start Setting: CSS and CSS,VEE
9.2.2.3
Selecting VDS Switch Over Threshold
9.2.2.4
Timer Selection
9.2.2.5
MOSFET Selection and SOA Checks
9.2.2.6
EMI Filter Consideration
9.2.2.7
Under Voltage and Over Voltage Settings
9.2.2.8
Choosing RVCC and CVCC
9.2.2.9
Power Good Interface to Downstream DC/DC
9.2.3
Application Curves
10
Power Supply Recommendations
11
Layout
11.1
Layout Guidelines
11.2
Layout Example
12
Device and Documentation Support
12.1
Device Support
12.1.1
Third-Party Products Disclaimer
12.2
Documentation Support
12.2.1
Related Documentation
12.3
Receiving Notification of Documentation Updates
12.4
Community Resources
12.5
Trademarks
12.6
Electrostatic Discharge Caution
12.7
Glossary
13
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
PW|16
MPDS361A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsdx2a_oa
slvsdx2a_pm
6.7
Typical Characteristics
Unless otherwise noted: –40°C ≤ T
J
≤125°C, 1.1 mA < I
VCC
< 10 mA, V
(UVEN)
= 2 V, V
(OV)
= V
(SNS)
= V
(D)
= 0 V, V
(SS)
= GATEx = Hi-Z , V
(TMR)
= 0 V,
V
Vref
/PG
= V
PROG
= Hi-Z
;
Ivcc injected into VCC pin
Figure 1.
VCC Regulation Voltage vs Current and Temperature
Figure 3.
I
sns
Current Vs Temperature
Figure 5.
V
VCC-GATE
vs Temperature
V
VCC
= 10 V, Regulation is current limit
Figure 2.
Iq vs Temperature and Operating Condition
Figure 4.
V
Vref
/PG
vs Temperature and I
VREF