SLVSER6B May 2020 – November 2020 TPS23730
PRODUCTION DATA
Selecting a converter topology along with a converter design procedure is beyond the scope of this application section.
The TPS23730 has the flexibility to be used in high power density flyback topologies such as primary side regulation synchronous or non-synchronous flyback.
Examples to help in programming the TPS23730 and additional design consideration are shown in Detailed Design Procedure. For a more specific converter design example, refer to the TPS23730EVM-093 EVM that is designed for the design parameters in Table 9-1.
PARAMETER | TEST CONDITIONS | MIN | TYPICAL | MAX | UNIT |
---|---|---|---|---|---|
Input voltage | Power applied through PoE or adapter | 0 | 57 | V | |
Operating voltage | After startup | 30 | 57 | V | |
Adapter voltage | 40 | 57 | V | ||
Input UVLO | Rising input voltage at device terminals | — | 40 | V | |
Falling input voltage | 30.5 | — | |||
Detection voltage | At device terminals | 1.4 | 10.1 | V | |
Classification voltage | At device terminals | 11.9 | 23 | V | |
Class 4 | Class signature A | 38 | 42 | mA | |
DCDC Topology | Active Clamp Forward | ||||
Output Voltage | 12 | V | |||
Output Current | 3.9 | A | |||
End-to-End Efficiency | At full load | 91 | % | ||
Switching Frequency | 250 | kHz |