SLVS933D July   2009  – December 2020 TPS23753A

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Product Information
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics: Controller Section Only
    6. 7.6 Electrical Characteristics: PoE and Control
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Pin Description
        1. 8.3.1.1  APD
        2. 8.3.1.2  BLNK
        3. 8.3.1.3  CLS
        4. 8.3.1.4  CS
        5. 8.3.1.5  CTL
        6. 8.3.1.6  DEN
        7. 8.3.1.7  FRS
        8. 8.3.1.8  GATE
        9. 8.3.1.9  RTN
        10. 8.3.1.10 VB
        11. 8.3.1.11 VC
        12. 8.3.1.12 VDD
        13. 8.3.1.13 VDD1
        14. 8.3.1.14 VSS
    4. 8.4 Device Functional Modes
      1. 8.4.1  Threshold Voltages
      2. 8.4.2  PoE Start-Up Sequence
      3. 8.4.3  Detection
      4. 8.4.4  Hardware Classification
      5. 8.4.5  Maintain Power Signature (MPS)
      6. 8.4.6  TPS23753A Operation
        1. 8.4.6.1 Start-Up and Converter Operation
        2. 8.4.6.2 PD Self-Protection
        3. 8.4.6.3 Converter Controller Features
      7. 8.4.7  Special Switching MOSFET Considerations
      8. 8.4.8  Thermal Considerations
      9. 8.4.9  FRS and Synchronization
      10. 8.4.10 Blanking – RBLNK
      11. 8.4.11 Current Slope Compensation
      12. 8.4.12 Adapter ORing
      13. 8.4.13 Protection
      14. 8.4.14 Frequency Dithering for Conducted Emissions Control
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Support Resources
    3. 12.3 Electrostatic Discharge Caution
    4. 12.4 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.4.4 Hardware Classification

Hardware classification allows a PSE to determine the power requirements of a PD before starting, and helps with power management once power is applied. The maximum power entries in Table 8-1 determine the class the PD must advertise. A Type 1 PD may not advertise Class 4. The PSE may disconnect a PD if it draws more than its stated Class power. The standard permits the PD to draw limited current peaks; however, the average power requirement always applies.

Voltage from 14.5 V to 20.5 V is applied to the PD for up to 75 ms during hardware classification. A fixed output voltage is sourced by the CLS pin, causing a fixed current to be drawn from VDD through RCLS. The total current drawn from the PSE during classification is the sum of bias and RCLS currents. PD current is measured and decoded by the PSE to determine which of the five available classes is advertised (see Table 8-1). The TPS23753A disables classification above VCU_OFF to avoid excessive power dissipation. CLS voltage is turned off during PD thermal limit or when APD or DEN are active. The CLS output is inherently current-limited, but should not be shorted to VSS for long periods of time.

Table 8-1 Class Resistor Selection
CLASSPOWER AT PD PICLASS CURRENT REQUIREMENTRESISTOR (Ω)NOTES
MINIMUM (W)MAXIMUM (W)MINIMUM (mA)MAXIMUM (mA)
00.4412.95041270
10.443.84912243
23.846.491720137
36.4912.95263090.9
412.9525.5364463.4Only permitted for type 2 devices