Refer to the PDF data sheet for device specific package drawings
The TPS23754 and TPS23756 devices have a combined power-over-ethernet (PoE), powered-device (PD) interface, and current-mode DC-DC controller optimized specifically for isolated converters. The PoE interface supports the IEEE 802.3at standard.
The TPS23754 and TPS23756 support a number of input voltage ORing options including highest voltage, external adapter preference, and PoE preference. These features allow the designer to determine which power source will carry the load under all conditions.
The PoE interface features the new extended hardware classification necessary for compatibility with high-power midspan power sourcing equipment (PSE) per IEEE 802.3at. The detection signature pin can also be used to force power from the PoE source off. Classification can be programmed to any of the defined types with a single resistor.
The DC-DC controller features two complementary gate drivers with programmable dead time. This simplifies the design of active-clamp forward converters or optimized gate drive for highly-efficient flyback topologies. The second gate driver may be disabled if desired for single MOSFET topologies. The controller also features internal soft start, bootstrap start-up source, current-mode compensation, and a 78% maximum duty cycle. A programmable and synchronizable oscillator allows design optimization for efficiency and eases use of the controller to upgrade existing power supply designs. Accurate programmable blanking, with a default period, simplifies the usual current-sense filter design trade-offs.
The TPS23754 device has a 15-V converter start-up while the TPS23756 device has a 9-V converter start-up. The TPS23754-1 replaces the PPD pin with a no-connect for increased pin spacing.
PART NUMBER | PACKAGE | BODY SIZE (NOM) |
---|---|---|
TPS23754 | HTSSOP (20) | 6.50 mm × 4.40 mm |
TPS23754-1 | ||
TPS23756 |
Changes from H Revision (September 2015) to I Revision
Changes from G Revision (October 2013) to H Revision
PIN | TYPE | DESCRIPTION | ||
---|---|---|---|---|
NAME | TPS23754 and TPS23756 | TPS23754-1 | ||
APD | 17 | 17 | I | Raising VAPD – VARTN above 1.5 V disables the internal hotswap switch, turns class off, and forces T2P active. This forces power to come from a external VDD1-RTN adapter. Tie APD to ARTN when not used. |
ARTN | 8 | 8 | — | ARTN is the DC-DC converter analog return. Tie to RTN and COM on the circuit board. |
BLNK | 18 | 18 | I | Connect to ARTN to use the internally set current-sense blanking period, or connect a resistor from BLNK to ARTN to program a more accurate period. |
CLS | 15 | 15 | I | Connect a resistor from CLS to VSS to program classification current. 2.5 V is applied to the program resistor during classification to set class current. |
COM | 4 | 4 | — | Gate driver return, connect to ARTN and RTN. |
CS | 3 | 3 | I/O | DC-DC converter switching MOSFET current sense input. See RCS in Figure 27. |
CTL | 1 | 1 | I | The control loop input to the pulse-width modulator (PWM), typically driven by output regulation feedback (for example, optocoupler). Use VB as a pullup for CTL. |
DEN | 13 | 13 | I/O | Connect a 24.9-kΩ resistor from DEN to VDD to provide the PoE detection signature. Pulling this pin to VSS during powered operation causes the internal hotswap MOSFET to turn off. |
DT | 16 | 16 | I | Connect a resistor from DT to ARTN to set the GATE to GAT2 dead time. Tie DT to VB to disable GAT2 operation. |
FRS | 19 | 19 | I | Connect a resistor from FRS to ARTN to program the converter switching frequency. FRS may be used to synchronize the converter to an external timing source. |
GATE | 5 | 5 | O | Gate drive output for the main DC-DC converter switching MOSFET. |
GAT2 | 7 | 7 | O | Gate drive output for a second DC-DC converter switching MOSFET (see Figure 27). |
NC | — | 14 | — | Float this no-connect pin. |
PAD | — | — | — | Connect to VSS. |
PPD | 14 | — | I | Raising VPPD-VSS above 1.55 V enables the hotswap MOSFET and activates T2P. Connecting PPD to VDD enables classification when APD is active. Tie PPD to VSS or float when not used. |
RTN | 9 | 9 | — | RTN is the output of the PoE hotswap MOSFET. |
T2P | 20 | 20 | O | Active low output that indicates a PSE has performed the IEEE 802.3at type 2 hardware classification, PPD is active, or APD is active. |
VB | 2 | 2 | O | 5.1-V bias rail for DC-DC control circuits and the feedback optocoupler. Typically bypass with a 0.1 μF to ARTN. |
VC | 6 | 6 | I/O | DC-DC converter bias voltage. Connect a 0.47 μF (minimum) ceramic capacitor to ARTN at the pin, and a larger capacitor to power start-up. |
VDD | 12 | 12 | I | Connect to the positive PoE input power rail. VDD powers the PoE interface circuits. Bypass with a 0.1-μF capacitor and protect with a TVS. |
VDD1 | 11 | 11 | I | Source of DC-DC converter start-up current. Connect to VDD for many applications. |
VSS | 10 | 10 | — | Connect to the negative power rail derived from the PoE source. |