SLVSDW2B December   2018  – November 2020 TPS23755

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics: DC-DC Controller Section
    6. 6.6 Electrical Characteristics: PoE and Control
    7. 6.7 Typical Characteristics
  7. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1  CLS Classification
      2. 7.3.2  DEN Detection and Enable
      3. 7.3.3  Internal Pass MOSFET
      4. 7.3.4  DC-DC Controller Features
        1. 7.3.4.1 VCC, VB and Advanced PWM Startup
        2. 7.3.4.2 CS, Current Slope Compensation and Blanking
        3. 7.3.4.3 COMP, FB, CP and Opto-less Feedback
        4. 7.3.4.4 FRS Frequency Setting and Synchronization
        5. 7.3.4.5 Frequency Dithering for Spread Spectrum Applications
        6. 7.3.4.6 SST and Soft-Start of the Switcher
        7. 7.3.4.7 AUX_V, AUX_D and Secondary Adapter Or'ing
      5. 7.3.5  Internal Switching FET - DRAIN, RSNS, SRF and SRR
      6. 7.3.6  VPD Supply Voltage
      7. 7.3.7  VDD Supply Voltage
      8. 7.3.8  GND
      9. 7.3.9  VSS
      10. 7.3.10 Exposed Thermal PAD
    4. 7.4 Device Functional Modes
      1. 7.4.1 PoE Overview
      2. 7.4.2 Threshold Voltages
      3. 7.4.3 PoE Start-Up Sequence
      4. 7.4.4 Detection
      5. 7.4.5 Hardware Classification
      6. 7.4.6 Maintain Power Signature (MPS)
      7. 7.4.7 Start-Up and Converter Operation
      8. 7.4.8 PD Self-Protection
      9. 7.4.9 Adapter ORing
  8. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1  Input Bridges and Schottky Diodes
        2. 8.2.2.2  Protection, D1
        3. 8.2.2.3  Capacitor, C1
        4. 8.2.2.4  Detection Resistor, RDEN
        5. 8.2.2.5  Classification Resistor, RCLS
        6. 8.2.2.6  Bulk Capacitance, CBULK
        7. 8.2.2.7  Output Voltage Feedback Divider, RAUX, R1,R2
        8. 8.2.2.8  Setting Frequency, RFRS
        9. 8.2.2.9  Frequency Dithering, RDTR and CDTR
        10. 8.2.2.10 Bias Voltage, CVB and DVB
        11. 8.2.2.11 Transformer design, T1
        12. 8.2.2.12 Current Sense Resistor, RCS
        13. 8.2.2.13 Current Slope Compensation, RS
        14. 8.2.2.14 Bias Supply Requirements, CCC, DCC
        15. 8.2.2.15 Switching Transformer Considerations, RVCC and CCC2
        16. 8.2.2.16 Primary FET Clamping, RCL, CCL, and DCL
        17. 8.2.2.17 Converter Output Capacitance, COUT
        18. 8.2.2.18 Secondary Output Diode Rectifier, DOUT
        19. 8.2.2.19 Slew rate control, RSRF and RSRR
        20. 8.2.2.20 Shutdown at Low Temperatures, DVDD and CVDD
      3. 8.2.3 Application Curves
  9. 9 Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Related documentation
    2. 11.2 Support Resources
    3. 11.3 Trademarks
    4. 11.4 Electrostatic Discharge Caution
    5. 11.5 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
  • RJJ|23
Thermal pad, mechanical data (Package|Pins)
Orderable Information

7.3.4.5 Frequency Dithering for Spread Spectrum Applications

The international standard CISPR 22 (and adopted versions) is often used as a requirement for conducted emissions. Ethernet cables are covered as a telecommunication port under section 5.2 for conducted emissions. Meeting EMI requirements is often a challenge, with the lower limits of Class B being especially hard. Circuit board layout, filtering, and snubbing various nodes in the power circuit are the first layer of control techniques. A more detailed discussion of EMI control is presented in Practical Guidelines to Designing an EMI Compliant PoE Powered Device With Isolated Flyback, SLUA469. Additionally, IEEE 802.3at sections 33.3 and 33.4 have requirements for noise injected onto the Ethernet cable based on compatibility with data transmission.

A technique referred to as frequency dithering can also be used to provide additional EMI measurement reduction. The switching frequency is modulated to spread the narrowband individual harmonics across a wider bandwidth, thus lowering peak measurements.

Frequency dithering is a built-in feature of the TPS23755. The oscillator frequency can be dithered by connecting a capacitor from DTHR to RTN and a resistor from DTHR to FRS. An external capacitor, CDTR (Figure 8-1), is selected to define the modulation frequency fm. This capacitor is being continuously charged and discharged between slightly less than 0.5 V and slightly above 1.5 V by a current source/sink equivalent to approximately 3x the current through FRS pin. CDTR value is defined according to:

Equation 3. GUID-30232714-B3E4-4FFF-A8C9-86DD9ED678D0-low.gif

fm should always be higher than 9 kHz, which is the resolution bandwidth applied during conducted emission measurement. Typically, fm should be set to around 11 kHz to account for component variations.

The resistor RDTR is used to determine ∆f, which is the amount of dithering, and its value is determined according to:

Equation 4. GUID-CB1C00D5-F4FF-4499-86B3-28D66DBCC2C4-low.gif

For example, a 13.2% dithering with a nominal switching frequency of 250 kHz results in frequency variation of ±33 kHz.