SLVSDW2B December 2018 – November 2020 TPS23755
PRODUCTION DATA
PIN | I/O | DESCRIPTION | |
---|---|---|---|
NO. | NAME | ||
1 | RSNS | O | Switching Power FET source connection. Connect to the external power current sense resistor. |
2 | CP | O | CP provides the clamp for the primary side regulation loop. Connect this pin to the lower end of the second primary side winding of the transformer. |
3 | GND | — | Power ground used by the flyback power FET gate driver and CP. Connect to RTN. |
4 | SRR | I | Switching FET Gate sinking current input, used for EMI control. Connect a resistance from SRR to GND to control the Vds rate of rise. |
5 | SRF | I | Switching FET Gate sourcing current input, used for EMI control. Connect a resistance from SRF to VB to control the Vds rate of fall. |
6 | VB | O | 5-V bias rail for the switching FET gate driver circuit. For internal use only. Bypass with a 0.1-μF ceramic capacitor and 6.2-V Zener diode to GND pin. |
7 | AUX_D | I | Auxiliary supply detect, internally pulled-up to approximately 5 V. Pull this pin low, typically through an optocoupler from the secondary side, to step down the output voltage of the DC-DC converter when a secondary side auxiliary supply is connected. |
8 | CS | I | DC-DC controller current sense input. Connect directly to the external power current sense resistor. |
9 | DTHR | O | Used for spread spectrum frequency dithering. Connect a capacitor from DTHR to RTN and a resistor from DTHR to FRS. If dithering is not used, short DTHR to VB pin. |
10 | FRS | I/O | This pin controls the switching frequency of the DC-DC converter. Tie a resistor from this pin to RTN to set the frequency. |
11 | RTN | — | RTN is the output of the PoE hotswap and the reference ground for the DC-DC controller. |
12 | VSS | — | Negative power rail derived from the PoE source. |
13 | VDD | — | Source of DC-DC converter start-up current. Connect to VPD for most applications. |
14 | VPD | — | Positive input power rail for PoE interface circuit. Derived from the PoE source. Bypass with a 0.1 µF to VSS and protect with a TVS. |
15 | DEN | I/O | Connect a 24.9-kΩ resistor from DEN to VPD to provide the PoE detection signature. Pulling this pin to VSS during powered operation causes the internal hotswap MOSFET to turn off. |
16 | CLS | O | Connect a resistor from CLS to VSS to program the classification current. |
17 | NC | — | No connect pin. Leave open. |
18 | FB | I | Converter error amplifier inverting (feedback) input. It is typically driven by a voltage divider from the auxiliary winding. Also connect to the COMP compensation network. |
19 | COMP | O | Compensation output of the DC-DC convertor error amplifier. Connect the compensation networks from this pin to the FB pin to compensate the converter. |
20 | AUX_V | O | AUX_V works with AUX_D to step down the output voltage setting of the DC-DC converter when an auxiliary supply is detected. Typically connected to FB pin through a resistor which defines the new voltage setting. |
21 | VCC | I/O | DC/DC converter bias voltage. The internal startup current source and converter bias winding output power this pin. Connect a 1-µF minimum ceramic capacitor to RTN. |
23 | NC | — | No connect pin. Leave open. |
24 | DRAIN | O | Drain connection to the internal switching power MOSFET of the DC/DC controller. |
- | PAD | — | The exposed thermal pad must be connected to VSS. A large fill area is required to assist in heat dissipation. |
A1-A4 | ANCHORS | — | Should be soldered to PCB for mechanical performance. These pins are not connected internally. |