SLVS646B September   2006  – November 2018 TPS2376-H

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
    1.     Device Images
      1.      Typical Application Circuit
  4. Revision History
  5. Device Comparison Table
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 ESD Ratings IEC
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Thermal Information
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO)
      2. 8.3.2 Programmable Inrush Current Limit and Fixed Operational Current Limit
      3. 8.3.3 Power Good
  9. Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Internal Thresholds
      2. 9.1.2 Detection
      3. 9.1.3 Classification
    2. 9.2 Typical Application
      1. 9.2.1 External Components
        1. 9.2.1.1 Detection Resistor and UVLO Divider
        2. 9.2.1.2 Magnetics
        3. 9.2.1.3 Input Diodes or Diode Bridges
        4. 9.2.1.4 Input Capacitor
        5. 9.2.1.5 Load Capacitor
        6. 9.2.1.6 Transient Suppressor
  10. 10Power Supply Recommendations
    1. 10.1 Maintain Power Signature
    2. 10.2 DC/DC Converter Startup
    3. 10.3 Auxiliary Power Source ORing
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Protection
    4. 11.4 ESD
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

Detection Resistor and UVLO Divider

The UVLO divider shown in Figure 13 is suitable where elimination of the detection resistor is desirable and the IEEE 802.3af compatible turn on is desired. The upper resistor dissipates about 116 mW at 55.5 V (57 V minus 1.5 V for an input diode bridge) at the maximum input, and supports 52 V. An 0805 size resistor is recommended for this resistor while an 0603 size resistor is suitable for the lower resistor.

Improved efficiency is obtained by using a detection resistor along with high-value UVLO resistors. The maximum UVLO divider resistance may be determined by considering the effect of the UVLO pin leakage current. The error is equal to the leakage current times the parallel resistance of the divider resistors. This may be simplified for the 39.5 V turn-on case to the leakage current times the lower divider resistance. The maximum resistance is the error voltage divided by the leakage current. For a 0.5% error, the maximum resistance is (0.005 * 2.49 V) / 1 μA, or approximately 12.4 kΩ. A possible divider for a turn-on voltage of 39.5 V is 178 kΩ / 12.1 kΩ resulting in a turn-on voltage of 39.1 V. A suitable value for RDET is 28.7 kΩ, yielding a detection resistance of 24.93 kΩ. The operating power loss at 55.5 V is 16 mW.

The input diode bridge's incremental resistance can be hundreds of ohms at the low currents seen at 2.7 V on the PI. The bridge resistance is in series with R(DET) and increases the total resistance seen by the PSE. This varies with the type of diode selected by the designer, and it is not usually specified on the diode data sheet. The value of R(DET) may be adjusted downwards to accommodate a particular diode type. The non-linear resistance shown in Figure 2 at low currents is the result of the diodes.