SLVS646B September   2006  – November 2018 TPS2376-H

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Typical Application Circuit
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 ESD Ratings IEC
    4. 7.4 Recommended Operating Conditions
    5. 7.5 Thermal Information
    6. 7.6 Electrical Characteristics
    7. 7.7 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Lockout (UVLO)
      2. 8.3.2 Programmable Inrush Current Limit and Fixed Operational Current Limit
      3. 8.3.3 Power Good
  9. 9 Application and Implementation
    1. 9.1 Application Information
      1. 9.1.1 Internal Thresholds
      2. 9.1.2 Detection
      3. 9.1.3 Classification
    2. 9.2 Typical Application
      1. 9.2.1 External Components
        1. 9.2.1.1 Detection Resistor and UVLO Divider
        2. 9.2.1.2 Magnetics
        3. 9.2.1.3 Input Diodes or Diode Bridges
        4. 9.2.1.4 Input Capacitor
        5. 9.2.1.5 Load Capacitor
        6. 9.2.1.6 Transient Suppressor
  10. 10Power Supply Recommendations
    1. 10.1 Maintain Power Signature
    2. 10.2 DC/DC Converter Startup
    3. 10.3 Auxiliary Power Source ORing
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
    3. 11.3 Thermal Protection
    4. 11.4 ESD
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.1.5 Load Capacitor

The IEEE 802.3af specification requires that the PD maintain a minimum load capacitance of 5 μF.

A PD can fail the dc MPS requirement if the load current to capacitance ratio is too small. This is caused by having a long input current dropout after a drop in input voltage. The PD should begin to draw input current within 300 ms of an abrupt 13 V input droop.

A particular design may have a tendency to cause ringing at the RTN pin during startup, inadvertent hot-plugs of the PoE input, or plugging in a wall adapter. It is recommended that a minimum value of 1 μF be used at the output of the TPS2376-H if downstream filtering prevents placing the larger bulk capacitor right on the output. When using ORing option 2, it is recommended that a large capacitor such as a 22 μF be placed across the TPS2376-H output.