TPS2379 IEEE 802.3at PoE High-Power PD Interface With External Gate Driver

1 Features

IEEE 802.3at Type-2 Hardware Classification With Status Flag
Auxiliary Gate Driver for High-Power Expansion
Robust 100-V, 0.5-Ω Hotswap MOSFET
1A (Typical) Operating Current Limit
140 mA (Typical) Inrush Current Limit
DC-DC Converter Enable
15 kV/8 kV System-level ESD Capability
PowerPAD™ HSOP Package

2 Applications

IEEE 802.3at-compliant Devices
Universal Power Over Ethernet (UPOE) Compliant Devices
Video and VoIP Telephones
Multiband Access Points
Security Cameras
Pico-Base Stations

3 Description

The TPS2379 device is an 8-pin integrated circuit that contains all of the features needed to implement an IEEE802.3at type-2 powered device (PD) such as Detection, Classification, Type 2 Hardware Classification, and 140-mA inrush current limit during startup. The low 0.5-Ω internal switch resistance, combined with the enhanced thermal dissipation of the PowerPAD package, enables this controller to continuously handle up to 0.85 A. The TPS2379 integrates a low 0.5-Ω internal switch to allow for up to 0.85 A of continuous current through the PD during normal operation. The TPS2379 device supports higher-power applications through an external pass transistor. The TPS2379 contains several protection features such as thermal shutdown, current limit foldback, and a robust 100-V internal switch.

Device Information⁽¹⁾

PART NUMBER	PACKAGE	BODY SIZE (NOM)
TPS2379	HSOP (8)	4.89 mm × 3.90 mm

For all available packages, see the orderable addendum at the end of the data sheet.

Typical Application Circuit

4 Revision History

Changes from * Revision (March 2012) to A Revision

Added ESD Ratings table, Feature Description section, Device Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information section Go
Deleted Classification Resistor, RCLS section.Go
Deleted CDB Pin Interface sectionGo
Deleted GATE Pin Interface section Go
Deleted External Boost Circuit (Q1, Q2, and R_BLST) Considerations sectionGo
Deleted T2P Pin Interface Go
Deleted Detailed Pin Descriptions section Go

5 Pin Configuration and Functions

DDA Package

8-Pin HSOP

Top View

Pin Functions

PIN		I/O	DESCRIPTION
NAME	NO.	I/O	DESCRIPTION
V_DD	1	I	Connect to positive PoE input power rail. Bypass with 0.1 µF to V_SS.
DEN	2	I/O	Connect 24.9 kΩ to V_DD for detection. Pull to V_SS disable pass MOSFET.
CLS	3	O	Connect resistor from CLS to V_SS to program classification current.
V_SS	4	—	Connect to negative power rail derived from PoE source.
RTN	5	O	Drain of PoE pass MOSFET.
CDB	6	O	Opendrain converter disable output, active low, referenced to RTN.
T2P	7	O	Active low indicates type 2 PSE connected.
GATE	8	O	Auxiliary gate driver output.
PowerPAD	—	—	The PowerPAD must be connected to V_SS. A large fill area is required to assist in heat dissipation.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted) ⁽¹⁾

		MIN	MAX	UNIT
Input voltage	V_DD, DEN	–0.3	100	V
	RTN⁽²⁾	–0.6	100
	CLS⁽³⁾	–0.3	6.5
	GATE⁽³⁾	–0.3	18
	[CDB, T2P] to RTN	–0.3	100
Sinking current	RTN⁽⁴⁾	Internally limited		mA
	CDB, T2P		5
	DEN		1
Sourcing current	CLS		65	mA
T_JMAX		Internally limited		°C
Storage temperature, T_stg		–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) With I(RTN) = 0

(3) Do not apply voltages to these pins

(4) SOA limited to RTN = 80 V at 1.2 A.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾	2000	V
		Charged device model (CDM), per JEDEC specification JESD22-C101, all pins⁽²⁾	500
		IEC 61000-4-2 contact discharge⁽³⁾	8000
		IEC 61000-4-2 air-gap discharge⁽³⁾	15000

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

(3) Discharges applied to circuit of Figure 26 between RJ-45, adapter, and output voltage rails.

6.3 Recommended Operating Conditions

Voltages with respect to V_SS (unless otherwise noted)

		MIN	MAX	UNIT
Input voltage range	RTN, V_DD	0	57	V
Input voltage range	T2P or CDB to RTN	0	57	V
Sinking current	RTN		0.85	A
Sinking current	CDB, T2P		2	mA
Resistance	CLS⁽¹⁾	60		Ω
Junction temperature		–40	125	°C

(1) Voltage should not be externally applied to this pin.

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		TPS2379	UNIT
		DDA (HSOP)
		8 PINS
R_θJA	Junction-to-ambient thermal resistance	45.9	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	51.9	°C/W
R_θJB	Junction-to-board thermal resistance	28.8	°C/W
ψ_JT	Junction-to-top characterization parameter	8.9	°C/W
ψ_JB	Junction-to-board characterization parameter	28.7	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	6.7	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953.

6.5 Electrical Characteristics

40 V ≤ V_VDD ≤ 57 V, R_DEN = 24.9 kΩ, CDB, CLS, GATE, T2P open; –40°C ≤ T_J ≤ 125°C. Positive currents are into pins. Typical values are at 25°C. All voltages are with respect to V_VSS (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
DETECTION (DEN)
	Detection current	Measure I_SUPPLY(VDD, RTN, DEN)				µA
		V_DD = 1.4 V	53.8	56.5	58.3
		V_DD = 10.1 V, Not in mark	395	410	417
	Bias current	DEN open, V_VDD = 10.1 V, Measure I_SUPPLY, Not in mark	3	4.8	12	µA
V_{PD_DIS}	Disable threshold	DEN falling	3	3.7	5	V
V_{PD_DIS}	Hysteresis		50	113	200	mV
CLASSIFICATION (CLS)
I_CLS	Classification current	13 V ≤ V_DD ≤ 21 V, Measure I_VDD + I_DEN + I_RTN
		R_CLS = 1270 Ω	1.8	2.17	2.6	mA
		R_CLS = 243 Ω	9.9	10.6	11.2
		R_CLS = 137 Ω	17.6	18.6	19.4
		R_CLS = 90.9 Ω	26.5	27.9	29.3
		R_CLS = 63.4 Ω	38	39.9	42
V_{CL_ON}	Class lower threshold	V_DD rising, V_CLS ↑	11.9	12.5	13	V
V_{CL_ON}		Hysteresis	1.4	1.6	1.7
V_{CL_H}		Hysteresis	1.4	1.6	1.7
V_{CU_ON}	Class upper threshold	V_DD rising, V_CLS↓	21	22	23	V
V_{CU_H}	Class upper threshold	Hysteresis	0.5	0.78	0.9
V_MSR	Mark reset threshold	V_VDD falling	3	3.9	5
	Mark state resistance	2-point measurement at 5 V and 10.1 V	6	10	12	kΩ
	Leakage current	V_DD = 57 V, V_CLS = 0 V, measure I_CLS			1	µA
GATE (AUXILIARY GATE OUTPUT)
	Output high voltage		8	10	12	V
	Sourcing current	V_GATE = 0 V	25	38	60	µA
	Sinking current	V_GATE = 4 V, V_DD = 48→ 25 V	0.6	1.25	1.75	mA
	Sinking current	V_DD = 25 V, V_GATE = 0→ 4 V	5	23.2	30	mA
	Current limit delay		150	365	600	µs
PASS DEVICE (RTN)
r_DS(ON)	On resistance		0.2	0.42	0.75	Ω
	Input bias current	V_DD = V_RTN = 30 V, measure I_RTN			30	µA
	Current limit	V_RTN=1.5 V	0.85	1	1.2	A
	Inrush current limit	V_RTN= 2 V, V_DD: 20 V → 48 V	100	140	180	mA
	Inrush termination	Percentage of inrush current	80%	90%	99%
	Foldback threshold	V_RTN rising	11	12.3	13.6	V
	Foldback deglitch time	V_RTN rising to when current limit changes to inrush current limit	500	800	1500	µs
CONVERTER DISABLE (CDB)
	Output low voltage	I_CDB = 2 mA, V_RTN = 2 V, V_DD: 20 V → 48 V		0.27	0.50	V
	Minimum voltage, V_{(VDD –RTN)}, for CDB to be valid	V_CDB = V_DD, I_CDB = 1 mA, in inrush		3		V
	Leakage current	V_CDB = 57 V, V_RTN = 0 V			10	µA
TYPE 2 PSE INDICATION (T2P)
V_T2P	Output low voltage	I_T2P = 2 mA, after 2-event classification and inrush is complete, V_RTN = 0 V		0.26	0.60	V
	Leakage current	V_T2P = 57 V, V_RTN = 0 V			10	µA
UVLO
V_{UVLO_R}	UVLO rising threshold	V_VDD rising	36.3	38.1	40	V
V_{UVLO_R}	UVLO falling threshold	V_VDD falling	30.5	32	33.6	V
V_{UVLO_H}	UVLO hysteresis			6.1		V
THERMAL SHUTDOWN
	Shutdown	T_J↑	135	145		°C
	Hysteresis			20		°C
V_DD BIAS CURRENT
	Operating current	40 V ≤ V_VDD ≤ 57 V		285	500	µA