SLUS634F November 2004 – January 2022 TPS2384
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT |
---|---|---|---|---|---|
Power Supply | |||||
V48 quiescent current | Off mode (all ports) | 4 | 9 | 12 | mA |
V48 quiescent current | Powered mode (all ports) | 10 | 14 | ||
V10, internal analog supply | ILOAD = 0 | 9.75 | 10.5 | 11.5 | V |
V3.3, internal digital supply | ILOAD = 0 to 3 mA | 3 | 3.3 | 3.7 | |
V3.3 short circuit current | V = 0 | 3 | 12 | mA | |
V6.3, internal supply | ILOAD = 0 | 5 | 6.3 | 7 | V |
V2.5, internal reference supply | ILOAD = 0 | 2.46 | 2.5 | 2.54 | |
Input UVLO | 26 | 32 | |||
Internal POR time out(I2C) | After all supplies are good I2C activity is valid | 8 | Clock Pulses | ||
Internal POR time out (Port) | After all supplies are good Port active to I2C commands | 66000 | |||
Port Discovery | |||||
Port off #P to #N input resistance | 400 | 600 | kΩ | ||
Discovery open circuit voltage | 22 | 30 | V | ||
Discovery 1 voltage loop control | 70 μA < IPORT < 3 mA | 2.8 | 4.4 | ||
Discovery 2 voltage loop control | 70 μA < IPORT < 3 mA | 8.8 | 10 | ||
Discovery current limit | P = N = 48 V | 3 | 4 | 5 | mA |
Auto-mode discovery resistance acceptance Band | 19 | 26.5 | kΩ | ||
Auto-mode discovery resistance low end rejection | 0 | 15 | |||
Auto-mode discovery resistance high end rejection | 33 | ||||
Discovery1,2 A/D conversion scale factor | 100 μA < IPORT < 3 mA | 5.30 | 6.10 | 6.75 | count/μA |
Port Classification | |||||
Classification voltage loop control | 100 μA < IPORT < 50 mA | 15.5 | 17.5 | 20 | V |
Classification current limit | P = N = 48 V | 51 | 60 | 100 | mA |
Class 0 to 1 detection threshold | 5.5 | 6.5 | 7.5 | ||
Class 1 to 2 detection threshold | 13 | 14.5 | 16 | ||
Class 2 to 3 detection threshold | 21 | 23 | 25 | ||
Class 3 to 4 detection threshold | 31 | 33 | 35 | ||
Class 4 to 0 detection threshold | 45 | 48 | 51 | ||
Classification A/D conversion scale factor | 375 | 424 | 475 | Count/ mA |
|
Port Legacy Detection | |||||
Legacy current limit | P = N = 48 V | 2.6 | 3.5 | 4.3 | mA |
Legacy voltage A/D conversion scale factor | 100 mV < VPORT < 17.5 V | 1365 | 1400 | 1445 | Count/V |
Port Powered Mode | |||||
Port on resistance | 20 mA < IPORT < 300 mA | 1.3 | 1.8 | Ω | |
Over current threshold (ICUT) | RBIAS = 124 kΩ, CT = 220 pF, –25 ≤ TJ ≤ 105 | 350 | 375 | 400 | mA |
Output current limit (ILIM) | 425 | 450 | |||
Disconnect timer current threshold | RBIAS = 124 kΩ, CT = 220 pF | 7.5 | 10 | ||
Port output UV | 42.0 | 42.7 | 44.0 | V | |
Port output OV | 54 | 55 | 56 | ||
Port current A/D conversion scale factor | 20 mA < IPORT < 56 V | 31 | 36.41 | 40 | Count/ mA |
Port voltage A/D conversion scale factor | 45 V < VPORT < 56 V | 335 | 353 | 370 | Count/V |
Port temperature A/D conversion | (17500 - counts)/16 | °C | |||
Port Disable Mode | |||||
Port N voltage | P = 48 V | 47 | V | ||
AC LO and AC HI Specification | |||||
AC_LO, AC_HI – low output voltage | 0 | 0.5 | V | ||
AC_LO – high output voltage | 3.0 | 5.0 | |||
AC_HI – high output voltage | 5.0 | 7.0 | |||
Digital I2C DC Specifications | |||||
SCL logic low input threshold (VIL) | 0.5 | V | |||
SDA_I logic low input threshold (VIL) | 1.25 | V | |||
SCL, SDA_I logic high input threshold (VIH) | 1.75 | V | |||
A1–A5 ,WD_DIS, ALTA/B, MS, PORB logic input threshold | 1.5 | V | |||
MS, PORB input hysteresis | 150 | V | |||
WD_DIS,ALTA/B, MS, PORB input pulldown resistance | Input voltage 0.5 to 3 V | 50 | kΩ | ||
A1–A5 pulldown current | 10 | μA | |||
SDA_O logic high leakage | Drain = 5 V | 100 | nA | ||
SDA_O logic low | ISINK = 10 mA | 200 | mV | ||
INTB logic high leakage | Drain = 6 V | 10 | μA | ||
INTB logic low | ISINK = 10 mA | 200 | mV |