SLUSC25A February 2015 – August 2017 TPS2388
PRODUCTION DATA.
COMMAND = 06h with 1 Data Byte, Read only
COMMAND = 07h with 1 Data Byte, Clear on Read
Active high, each bit corresponds to a particular event that occurred.
Each bit xxx1-4 represents an individual port.
A read at each location (06h or 07h) returns the same register data with the exception that the Clear on Read command clears all bits of the register. These bits are cleared when port n is turned off.
If this register is causing the INT pin to be activated, this Clear on Read will release the INT pin.
Any active bit will have an impact on the Interrupt register as indicated in the Interrupt register description.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
DISF4 | DISF3 | DISF2 | DISF1 | ICUT4 | ICUT3 | ICUT2 | ICUT1 |
R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 |
CR-0 | CR-0 | CR-0 | CR-0 | CR-0 | CR-0 | CR-0 | CR-0 |
LEGEND: R/W = Read/Write; R = Read only; ; CR = Clear on Read, -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7–4 | DISF4–DISF1 | R or CR | 0 | Indicates that a disconnect event occurred. 1 = Disconnect event occurred 0 = No disconnect event occurred |
3–0 | ICUT4–ICUT1 | R or CR | 0 | Indicates that a tOVLD Fault occurred. 1 = tOVLD Fault occurred 0 = No tOVLD Fault occurred |
Note that if ICUT is disabled for a port, this port will not be automatically turned off during an ICUT fault condition. However, the ICUT fault flag will still be operational, with a fault timeout equal to tLIM / 2.
Also, if a Clear on Read is done at the Fault Event register, not only the ICUTn bit is reset, but the associated port ICUT counter is also reset.
Note that this has no impact on TLIM counter at all.
In any other case, ICUT fault is related to TOVLD fault timer as usual and there is no counter reset during clear on read operation.