SLUSC25A February 2015 – August 2017 TPS2388
PRODUCTION DATA.
COMMAND = 08h with 1 Data Byte, Read only
COMMAND = 09h with 1 Data Byte, Clear on Read
Active high, each bit corresponds to a particular event that occurred.
Each bit xxx1-4 represents an individual port.
A read at each location (08h or 09h) returns the same register data with the exception that the Clear on Read command clears all bits of the register. These bits are cleared when port n is turned off.
If this register is causing the INT pin to be activated, this Clear on Read will release the INT pin.
Any active bit will have an impact on the Interrupt register as indicated in the Interrupt register description.
Note: When a Start Fault is reported after the IEEE Power Enable command is used, if the PECn bit in Power Event register is set, then there is an Inrush fault. If PECn bit is not set, then the Power-On Fault register indicates the cause of the fault.
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ILIM4 | ILIM3 | ILIM2 | ILIM1 | STRT4 | STRT3 | STRT2 | STRT1 |
R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 |
CR-0 | CR-0 | CR-0 | CR-0 | CR-0 | CR-0 | CR-0 | CR-0 |
LEGEND: R/W = Read/Write; R = Read only; ; CR = Clear on Read, -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7–4 | ILIM4–ILIM1 | R or CR | 0 | Indicates that a tLIM fault occurred, which means the port has limited its output current to ILIM or the folded back ILIM for more than tLIM. 1 = tLIM fault occurred 0 = No tLIM fault occurred |
3–0 | STRT4–STRT1 | R or CR | 0 | Indicates that a tSTART fault occurred at port turn on. Also indicates if a class or detection error occurred during a port turn on using the IEEE Power Enable command. 1 = tSTART fault or class/detect error occurred 0 = No tSTART fault or class/detect error occurred |