SLUSD53G March 2018 – August 2020 TPS23880
PRODUCTION DATA
COMMAND = 2Bh with 1 Data Byte, Read/Write
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
POL34_7 | POL34_6 | POL34_5 | POL34_4 | POL34_3 | POL34_2 | POL34_1 | POL34_0 |
R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W-1 | R/W1 |
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset |
Bit | Field | Type | Reset | Description |
---|---|---|---|---|
7–0 | POLnn_7- POLnn_0 | R/W | 1 | 1-byte defining the summed 4-Pair PCUT minimum threshold.
The equation defining the PCUT is: PCUT = (N × PCSTEP) Where, when assuming 0.255-Ω Rsense resistor is used: PCSTEP = 0.5 W |
These bits set the minimum threshold for the design. Internally, the typical PCUT threshold is set slightly above this value to ensure that the device does not trip a Pcut fault at or below the set value in this register due to part to part or temperature variation.
For 4-pair wired, the 2P Policing values are still applied to the individual Channels. See the description for registers 0x1Eh through 0x21h for more information on 2-Pair Policing.
The contents of this register is reset to 0xFFh anytime the port is turned off or disabled either due to fault condition or user command
4-Pair Power Policing:
The TPS23880 implements a true Power Policing limit, where the device will adjust the policing limit based on both voltage and sum of current variation in order to ensure a reliable power limit.
In Semi Auto and Auto modes, these bits are automatically set during power on based on the assigned class (see Table 9-45). If an alternative value is desired, it needs to be set after the PEn bit is set in register 0x10h.
Assigned Class | POLnn7-0 Settings | Minimum Power |
---|---|---|
Class 1 | 0000 1000 | 4W |
Class 2 | 0000 1110 | 7W |
Class 3 | 0001 1111 | 15.5W |
Class 4 | 0011 1100 | 30W |
Class 5 | 0101 1010 | 45W |
Class 6 | 0111 1000 | 60W |
Class 7 | 1001 0110 | 75W |
Class 8 | 1011 0100 | 90W |
For a 4-pair dual signature devices, these values will be set based on the sum of the assigned classes of both channels, but 4P PCut will be disabled (4PPCTnn bit in 0x2D = 0) by default as the primary policing method for dual signature devices will be the 2-Pair values defined in registers 0x1Eh - 0x21h.
Setting the 4PPCTnn bit in 0x2D will enable 4P Policing if desired.