SLVSF21D August 2019 – August 2020 TPS23882
PRODUCTION DATA
COMMAND = 24h with 1 Data Byte, Read Only
COMMAND = 25h with 1 Data Byte, Clear on Read
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
PF4 | PF3 | PF2 | PF1 | ||||
R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 | R-0 |
CR-0 | CR-0 | CR-0 | CR-0 | CR-0 | CR-0 | CR-0 | CR-0 |
LEGEND: R/W = Read/Write; R = Read only; W = Write only; CR = Clear on Read; -n = value after reset |
Bit | Field | Type | Reset | Description | ||||
---|---|---|---|---|---|---|---|---|
7–0 | PF4–PF1 | R or CR | 0 | Represents the fault status
of the classification and detection for channel n, following a failed turn on
attempt with the PWONn command. These bits are cleared when channel n is turned off.
PFn: the selection is as follows: |
||||
Fault Code | Power-on Fault Description | |||||||
0 | 0 | No fault | ||||||
0 | 1 | Invalid detection | ||||||
1 | 0 | Classification Error | ||||||
1 | 1 | Insufficient Power | ||||||
When a Start Fault occurs and the PECn bit is not set, then this register will indicate the cause of the fault.
An insufficient power fault is reported anytime the reg 0x29 configuration will not allow a channel to be powered. See the section describing Section 9.1.5.