SLVSAL1E March   2011  – April 2016 TPS24720

PRODUCTION DATA.  

  1. Features
  2. Applications
  3. Description
  4. Revision History
  5. Pin Configuration and Functions
  6. Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 THERMAL INFORMATION
    4. 6.4 Recommended Operating Conditions
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Detailed Pin Descriptions
        1. 7.3.1.1  EN
        2. 7.3.1.2  ENSD
        3. 7.3.1.3  FFLTb
        4. 7.3.1.4  FLTb
        5. 7.3.1.5  GATE
        6. 7.3.1.6  GND
        7. 7.3.1.7  IMON
        8. 7.3.1.8  LATCH
        9. 7.3.1.9  OUT
        10. 7.3.1.10 OV
        11. 7.3.1.11 PGb
        12. 7.3.1.12 PROG
        13. 7.3.1.13 SENSE
        14. 7.3.1.14 SET
        15. 7.3.1.15 TIMER
        16. 7.3.1.16 VCC
    4. 7.4 Device Functional Modes
      1. 7.4.1  Board Plug-In
      2. 7.4.2  Inrush Operation
      3. 7.4.3  Action of the Constant-Power Engine
      4. 7.4.4  Circuit Breaker and Fast Trip
      5. 7.4.5  Automatic Restart
      6. 7.4.6  PGb, FLTb, and Timer Operations
      7. 7.4.7  Overtemperature Shutdown
      8. 7.4.8  Start-Up of Hot-Swap Circuit by VCC or EN
      9. 7.4.9  Minimization of Power Dissipation at STANDY by ENSD
      10. 7.4.10 Fault Detection of MOSFET Short With FFLTb
  8. Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
        1. 8.2.2.1 Power-Limited Start-Up
          1. 8.2.2.1.1 STEP 1. Choose RSENSE, RSET, and RIMON
          2. 8.2.2.1.2 STEP 2. Choose MOSFET M1
          3. 8.2.2.1.3 STEP 3. Choose Power-Limit Value, PLIM, and RPROG
          4. 8.2.2.1.4 STEP 4. Choose Output Voltage Rising Time, tON, and Timing Capacitor CT
          5. 8.2.2.1.5 STEP 5. Calculate the Retry-Mode Duty Ratio
          6. 8.2.2.1.6 STEP 6. Select R1, R2, and R3 for UV and OV
          7. 8.2.2.1.7 STEP 7. Choose RGATE, R4, R5, R6, and C1
        2. 8.2.2.2 Additional Design Considerations
          1. 8.2.2.2.1 Use of PGb
          2. 8.2.2.2.2 Output Clamp Diode
          3. 8.2.2.2.3 Gate Clamp Diode
          4. 8.2.2.2.4 High-Gate-Capacitance Applications
          5. 8.2.2.2.5 Bypass Capacitors
          6. 8.2.2.2.6 Output Short-Circuit Measurements
      3. 8.2.3 Application Curve
  9. Power Supply Recommendations
  10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
  11. 11Device and Documentation Support
    1. 11.1 Documentation Support
    2. 11.2 Trademarks
    3. 11.3 Electrostatic Discharge Caution
    4. 11.4 Glossary
  12. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9 Power Supply Recommendations

Use a 10-nF to 1-μF ceramic capacitor to bypass the VCC pin to GND. When the input bus power feed is inductive, then a transient voltage suppressor (TVS) may also be required.