8.3.16.1 Start-Up

Input power to the TPS2505 is provided from IN to GND. The device has an undervoltage lockout (UVLO) circuit that disables the device until the voltage on IN exceeds 2.15 V (typical). The TPS2505 goes through its normal start-up process and attempts to regulate the AUX voltage to 5.1 V (typical).

The boost converter has a two-step start-up sequence. During the initial startup, the output of the boost is connected to V_IN through a resistive switch that limits the startup current, I_START, to be below 100 mA. This allows the TPS2505 to be USB 2.0 compliant when powered by an upstream USB port. The boost output must be unloaded during startup. I_START charges the output capacitance on V_AUX until V_AUX reaches V_IN – V_EXIT. The converter begins to switch once V_AUX exceeds V_IN – V_EXIT. The initial duty cycle of the device is limited by a closed-loop soft start that ramps the reference voltage to the internal error amplifier to provide a controlled, monotonic start-up on V_AUX. The boost converter goes through this cycle any time the voltage on V_AUX drops below V_IN – V_EXIT due to overload conditions or the boost converter re-enables after normal shutdown.

The USB switches are powered directly from V_AUX and turns on once the UVLO of the USB switches is met
(4.3 V typical). The turnon is controlled internally to provide a monotonic start-up on VUSB1/2.

8.3.16.2 Normal Operation

The boost converter runs at a 1-MHz fixed frequency and regulates the output voltage VAUX using a pulse-width modulating (PWM) topology that adjusts the duty cycle of the low-side N-channel MOSFET on a cycle-by-cycle basis. The PWM latch is set at the beginning of each clock cycle and commands the gate driver to turn on the low-side MOSFET. The low-side MOSFET remains on until the PWM latch is reset.

Voltage regulation is controlled by a peak-current-mode control architecture. The voltage loop senses the voltage on V_AUX and provides negative feedback into an internal, transconductance-error amplifier with internal compensation and resistor divider. The output of the transconductance-error amplifier is summed with the output of the slope-compensation block and provides the error signal that is fed into the inverting input of the PWM comparator. Slope compensation is necessary to prevent subharmonic oscillations that may occur in peak-current mode control architectures that exceed 50% duty cycle. The PWM ramp fed into the noninverting input of the PWM comparator is provided by sensing the inductor current through the low-side N-channel MOSFET. The PWM latch is reset when the PWM ramp intersects the error signal and terminates the pulse width for that clock period. The TPS2505 stops switching if the peak-demanded current signal from the error amplifier falls below the zero-duty-cycle threshold of the device.

8.3.16.3 Low-Frequency Mode

The TPS2505 enters low-frequency mode above V_IN = V_LFM (4.35 V typical) by reducing the dc/dc converter frequency from 1 MHz (typical) to 250 kHz (typical). Current-mode control topologies require internal leading-edge blanking of the current-sense signal to prevent nuisance trips of the PWM control MOSFET. The consequence of leading-edge blanking is that the PWM controller has a minimum controllable on-time (85 ns typical) that results in a minimum controllable duty cycle. In a boost converter, the demanded duty cycle decreases as the input voltage increases. The boost converter pulse-skips if the demanded duty cycle is less than what the minimum controllable ON-time allows, which is undesirable due to the excessive increase in switching ripple. When the TPS2505 enters low-frequency mode above V_IN = V_LFM, the minimum controllable duty cycle is increased because the minimum controllable on-time is a smaller percentage of the entire switching period. Low-frequency mode prevents pulse skipping at voltages larger than V_LFM. The TPS2505 resumes normal 1-MHz switching operation when V_IN decreases below V_LFM.

One effect of reducing the switching frequency is that the ripple current in the inductor and output AUX capacitors is increased. It is important to verify that the peak inductor current does not exceed the peak switch current limit I_SW (4.5 A typical) and that the increase in AUX ripple is acceptable during low-frequency mode.

8.3.16.4 No-Frequency Mode

The TPS2505 enters no-frequency mode above V_IN = V_NFM (5.05 V typical) by disabling the oscillator and turning on the high-side synchronous PMOS 100% of the time. The input voltage is now directly connected to the AUX output through the inductor and high-side PMOS. Power dissipation in the device is reduced in no-frequency mode because there is no longer any switching loss and no RMS current flows through the low-side control NMOS, which results in higher system-level efficiency. The boost converter resumes switching when V_IN falls below V_NFM.

8.3.16.5 Pulsed Frequency Mode (PFM) Light-Load Operation

The TPS2505 enters the PFM control scheme at light loads to increase efficiency. The device reduces power dissipation while in the PFM control scheme by disabling the gate drivers and power MOSFETs and entering a pulsed-frequency mode (PFM). PFM works by disabling the gate driver when the PFM latch is set. During this time period there is no switching, and the load current is provided solely by the output capacitor. There are two comparators that determine when the device enters or leaves the PFM control scheme. The first comparator is the PFM-enter comparator. The PFM-enter comparator monitors the peak demanded current in the inductor and allows the device to enter the PFM control scheme when the inductor current falls below IIND_LOW (420 mA typical). The second comparator is the AUX-low comparator. The AUX-low comparator monitors AUX and forces the converter out of the PFM control scheme and resumes normal operation when the voltage on AUX falls below AUXLOW (5 V typical). The PFM control scheme is disabled during low-frequency mode when V_IN > V_LFM (4.35 V typical).

8.3.16.6 Overvoltage Protection

The TPS2505 provides overvoltage protection on V_AUX to protect downstream devices. Overvoltage protection is provided by disabling the gate drivers and power MOSFETs when an overvoltage condition is detected. The TPS2505 uses a single AUX-high comparator to monitor the AUX voltage by sensing the voltage on the internal feedback node fed into the error amplifier. The AUX-high comparator disables the gate driver whenever the voltage on AUX exceeds the regulation point by 5% (typical). The gate driver remains disabled until the AUX voltage falls below the 5% high OVP threshold. The overvoltage protection feature is disabled when VI_N > V_NFM (5.05 V typical) to prevent unwanted shutdown.

8.3.16.7 Overload Conditions

The TPS2505 boost converter uses multiple overcurrent protection features to limit current in the event of an overload or short-circuit condition. The first feature is the lower current-limit comparator that works on a cycle-by-cycle basis. This comparator turns off the low-side MOSFET by resetting the PWM latch whenever the current through the low-side MOSFET exceeds 4.5 A (typical). The low-side MOSFET remains off until the next switching cycle. The second feature is the upper current-limit comparator that disables switching for eight switching cycles whenever the current in the low-side MOSFET exceeds 6.7 A (typical). After eight switching cycles, the boost converter resumes normal operation. The third feature is the constant-current start-up I_START comparator that disables switching and regulates the current through the high-side MOSFET whenever the voltage on V_AUX drops below the input voltage by V_EXIT (700 mV typ). This feature protects the boost converter in the event of an output short circuit on V_AUX. I_START also current-limit protects the synchronous MOSFET in no-frequency mode when V_IN > V_NFM (5.05 V typical). The converter goes through normal start-up operation once the short-circuit condition is removed. A fourth feature is the 85% (typical) maximum-duty-cycle clamp that prevents excessive current from building in the inductor.

8.3.16.8 Determining the Maximum Allowable AUX and USB1/2 Current

The maximum output current of the boost converter out of AUX depends on several system-level factors including input voltage, inductor value, switching frequency, and ambient temperature. The limiting factor for the TPS2505 is the peak inductor current, which cannot exceed I_SW (3 A minimum). The cycle-by-cycle current-limit turns off the low-side NMOS as a protection mechanism whenever the inductor current exceeds I_SW. Figure 1 can be used as a guideline for determining the maximum total current at different input voltages. The typical plot assumes nominal conditions: 2.2-µH inductor, 1-MHz/250-kHz switching frequency, nominal MOSFET on-resistances. The conservative plot assumes more pessimistic conditions: 1.7-µH inductor, 925-kHz/230-kHz switching frequency, and maximum MOSFET on-resistances. The graph accounts for the frequency change from 1-MHz to 250-kHz when V_IN > V_LFM (4.35 V typical) and for the no-frequency mode when V_IN > V_NFM (5.05 V typical), which explains the discontinuities of the graph.

8.3.17.1 Overview

The TPS2505 integrates a current-limited, power-distribution switches using N-channel MOSFETs for applications where short circuits or heavy capacitive loads are encountered. The current-limit threshold is user-programmable from 130 mA to 1.4 A (typical) by selecting an external resistor. The device incorporates an internal charge pump and gate-drive circuitry necessary to fully enhance the N-channel MOSFETs. The internal gate drivers controls turnon of the MOSFETs to limit large current and voltage surges by providing built-in soft-start functionality. The power switches have an independent undervoltage lockout (UVLO) circuit that disables them until the voltage on AUX reaches 4.3 V (typical). Built-in hysteresis prevents unwanted on/off cycling due to input voltage drop on AUX from current surges on the output of the power switch. The power switches have an independent logic-level enable control (ENUSB1/2) that gates power-switch turnon and bias for the charge pump, driver, and miscellaneous control circuitry. A logic-high input on ENUSB1/2 enables the drivers, control circuits, and power switches. The enable input are compatible with CMOS, TTL, LVTTL, 2.5-V, and 1.8-V logic levels.

8.3.17.2 Overcurrent Conditions

The TPS2505 power switches respond to overcurrent conditions by limiting its output current to the IOS level. The device maintains a constant output current and reduces the output voltage accordingly during an overcurrent condition. Two possible overload conditions can occur. The first condition is when a short circuit or partial short circuit is present on the output of the switch prior to device turn-on and the device is powered up or enabled. The output voltage is held near zero potential with respect to ground, and the TPS2505 ramps the output current to IOS. The TPS2505 power switches limit the current to IOS until the overload condition is removed or the device begins to cycle thermally. The second condition is when a short circuit, partial short circuit, or transient overload occurs while the device is already enabled and powered on. The current-sense amplifier is overdriven during this time and momentarily disables the power switch. The current-sense amplifier recovers and limits the output current to I_OS. The power switches thermally cycle if an overload condition is present long enough to activate thermal limiting in any of the foregoing cases. The power switches turns off when the junction temperature exceeds 130°C while in current-limit. The power switches remains off until the junction temperature cools 10°C and then restarts. The TPS2505 power switches cycles on/off until the overload is removed. The boost converter is independent of the power-switch thermal sense and continues to operate as long as the temperature of the boost converter remains less than 150°C and does not trigger the boost-converter thermal sense.

8.3.17.3 FAULT1/2 Response

The FAULT1/2 open-drain outputs are asserted low during an overcurrent condition that causes V_USB to fall below V_TRIP (4.6 V typical) or causes the junction temperature to exceed the shutdown threshold (130°C). The TPS2505 asserts the FAULT1/2 signals until the fault condition is removed and the power switches resume normal operation. The FAULT1/2 signals are independent of the boost converter or each other. The FAULT1/2 signals use an internal delay deglitch circuit (8-ms typical) to delay asserting the FAULT1/2 signals during an overcurrent condition. The power switches must remain in an overcurrent condition for the entire deglitch period or the deglitch timer is restarted. This ensures that FAULT1/2 are not accidentally asserted due to normal operation such as starting into a heavy capacitive load. The deglitch circuitry delays entering and leaving fault conditions. Overtemperature conditions are not deglitched and assert the FAULT1/2 signals immediately.

8.3.17.4 Undervoltage Lockout

The undervoltage lockout (UVLO) circuit disables the TPS2505 power switch until the input voltage on AUX reaches the power switch UVLO turn-on threshold of 4.3 V (typical). Built-in hysteresis prevents unwanted on/off cycling due to input-voltage drop from large current surges.

8.3.17.5 Programming the Current-Limit Threshold Resistor R_ILIM

The overcurrent thresholds are user programmable via external resistors. The TPS2505 uses an internal regulation loop to provide a regulated voltage on the ILIM1/2 pins. The current-limit thresholds are proportional to the current sourced out of ILIM1/2. The recommended 1% resistor range for RILIM1/2 is
16.1 kΩ ≤ R_ILIM ≤ 200 kΩ to ensure stability of the internal regulation loop. Many applications require that the minimum current limit is above a certain current level or that the maximum current limit is below a certain current level, so it is important to consider the tolerance of the overcurrent threshold when selecting a value for RILIM1/2. The following equations and Figure 10 can be used to calculate the resulting overcurrent threshold for a given external resistor value (RILIM1/2). Figure 10 includes current-limit tolerance due to variations caused by temperature and process. However, the equations do not account for tolerance due to external resistor variation, so it is important to account for this tolerance when selecting RILIM1/2. The traces routing the RILIM1/2 resistors to the TPS2505 should be as short as possible to reduce parasitic effects on the current-limit accuracy. RILIM1/2 can be selected to provide a current-limit threshold that occurs 1) above a minimum load current or 2) below a maximum load current.

To design above a minimum current-limit threshold, find the intersection of R_ILIM and the maximum desired load current on the I_OS(min) curve and choose a value of R_ILIM below this value. Programming the current limit above a minimum threshold is important to ensure start up into full load or heavy capacitive loads. The resulting maximum current-limit threshold is the intersection of the selected value of RILIM1/2 and the I_OS(max) curve. To design below a maximum current-limit threshold, find the intersection of R_ILIM and the maximum desired load current on the I_OS(max) curve and choose a value of RILIM1/2 above this value. Programming the current limit below a maximum threshold is important to avoid current-limiting upstream power supplies, causing the input voltage bus to droop. The resulting minimum current-limit threshold is the intersection of the selected value of RILIM1/2 and the IOS(min) curve. Current-limit threshold equations (I_OS):

Equation 1.

Equation 2.

Equation 3.

VIN = 3.3 V

IAUX = 0 A

Secondary USB Switch Disabled

Figure 10. USB Current-Limit Threshold vs
R_ILIM Overtemperature and Process

8.3.21.1 Boost Inductor

Connect the boost inductor from IN to SW. The inductance controls the ripple current through the inductor. A 2.2-µH inductor is recommended, and the minimum and maximum inductor values are constrained by the integrated features of the TPS2505. The minimum inductance is limited by the peak inductor-current value. The ripple current in the inductor is inversely proportional to the inductance value, so the output voltage may fall out of regulation if the peak inductor current exceeds the cycle-by-cycle current-limit comparator (3 A minimum). Using a nominal 2.2-µH inductor allows full recommended current operation even if the inductance is 20% low (1.76 µH) due to component variation. The maximum inductance value is limited by the internal compensation of the boost-converter control loop. A maximum 4.7-µH (typical) inductor value is recommended to maintain adequate phase margin over the full range of recommended operating conditions.

8.3.21.2 IN Capacitance

Connect the input capacitance from IN to the reference ground plane (see for connecting PGND and GND to the ground plane). Input capacitance reduces the AC voltage ripple on the input rail by providing a low-impedance path for the switching current of the boost converter. The TPS2505 does not have a minimum or maximum input capacitance requirement for operation, but a 10-µF, X7R or X5R ceramic capacitor is recommended for most applications for reasonable input-voltage ripple performance. There are several scenarios where it is recommended to use additional input capacitance:

• The output impedance of the upstream power supply is high, or the power supply is located far from the TPS2505.
• The TPS2505 is tested in a lab environment with long, inductive cables connected to the input, and transient voltage spikes could exceed the absolute maximum voltage rating of the device.
• The device is operating in PFM control scheme near V_IN = 1.8 V, where insufficient input capacitance may cause the input ripple voltage to fall below the minimum 1.75-V (typical) UVLO circuit, causing device turnoff. Additionally, it is good engineering practice to use an additional 0.1-µF ceramic decoupling capacitor close to the IC to prevent unwanted high-frequency noise from coupling into the device.

8.3.21.3 AUX Capacitance

Connect the boost-converter output capacitance from AUX to the reference ground plane. The AUX capacitance controls the ripple voltage on the AUX rail and provides a low-impedance path for the switching and transient-load currents of the boost converter. It also sets the location of the output pole in the control loop of the boost converter. There are limitations to the minimum and maximum capacitance on AUX. The recommended minimum capacitance on AUX is a 22-µF, X5R or X7R ceramic capacitor. A 10-V rated ceramic capacitor is recommended to minimize the capacitance derating loss due to dc bias applied to the capacitor. The low ESR of the ceramic capacitor minimizes ripple voltage and power dissipation from the large, pulsating currents of the boost converter and provides adequate phase margin across all recommended operating conditions. In some applications, it is desirable to add additional AUX capacitance. Additional AUX capacitance reduces transient undershoot and overshoot voltages due to load steps and reduces AUX ripple in the PFM control scheme. Adding AUX capacitance changes the control loop, resulting in reduced phase margin, so it is recommended that no more than 220 µF of additional capacitance be added in parallel to the 22-µF ceramic capacitor. The combined output capacitance on AUX and USB should not exceed 500 µF.

8.3.21.4 USB Capacitance

Connect the USB1/2 capacitances from USB1/2 to the reference ground plane. The USB1/2 capacitances are on the outputs of the power switches and provide energy for transient load steps. The TPS2505 does not require any USB capacitance for operation. Additional capacitance can be added on USB1/2 outputs, but it is recommended to not exceed 220 µF to maintain adequate phase margin for the boost converter control loop. The combined output capacitance on AUX and USB should not exceed 500 µF. USB applications require a minimum of 120 µF on downstream facing ports.

8.3.21.5 ILIM1/2 and FAULT1/2 Resistors

Connect the ILIM1/2 resistors from ILIM1/2 to the reference ground plane. The ILIM1/2 resistors programs the current-limit threshold of the USB power switches (see Programming the Current-Limit Threshold Resistor RILIM). The ILIM1/2 pins are the output of internal linear regulators that provide a fixed 400-mV output. The recommended nominal resistor value using 1% resistors on ILIM1/2 is 16.1 kΩ ≤ R_ILIM ≤ 200 kΩ. This range should be adjusted accordingly if 1% resistors are not used. Do not overdrive ILIM1/2 with an external voltage or connect directly to GND. Connect the ILIM1/2 resistors as close to the TPS2505 as possible to minimize the effects of parasitics on device operation. Do not add external capacitance on the ILIM1/2 pins. The ILIM1/2 pins should not be left floating. Connect the FAULT1/2 resistors from the FAULT1/2 pins to an external voltage source such as V_AUX or V_IN. The FAULT1/2 pins are open-drain outputs capable of sinking a maximum current of 10 mA continuously. The FAULT1/2 resistors should be sized large enough to limit current to under 10 mA continuously. Do not tie FAULT1/2 directly to an external voltage source. The maximum recommended voltage on FAULT1/2 is 6.5 V. The FAULT1/2 pin can be left floating if not used.