SLVSCJ0E March   2014  – June 2021 TPS25200

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable
      2. 8.3.2 Thermal Sense
      3. 8.3.3 Overcurrent Protection
      4. 8.3.4 FAULT Response
      5. 8.3.5 Output Discharge
    4. 8.4 Device Functional Modes
      1. 8.4.1 Undervoltage Lockout (UVLO)
      2. 8.4.2 Overcurrent Protection (OCP)
      3. 8.4.3 Overvoltage Clamp (OVC)
      4. 8.4.4 Overvoltage Lockout (OVLO)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Step by Step Design Produce
        2. 9.2.2.2 Input and Output Capacitance
        3. 9.2.2.3 Programming the Current-Limit Threshold
        4. 9.2.2.4 Design Above a Minimum Current Limit
        5. 9.2.2.5 Design Below a Maximum Current Limit
        6. 9.2.2.6 Power Dissipation and Junction Temperature
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.2.2.6 Power Dissipation and Junction Temperature

The low on-resistance of the internal N-channel MOSFET allows small surface-mount packages to pass large currents. It is good design practice to estimate power dissipation and junction temperature. The below analysis gives an approximation for calculating junction temperature based on the power dissipation in the package. However, it is important to note that thermal analysis is strongly dependent on additional system level factors. Such factors include air flow, board layout, copper thickness and surface area, and proximity to other devices dissipating power. Good thermal design practice must include all system level factors in addition to individual component analysis. Begin by determining the rDS(on) of the N-channel MOSFET relative to the input voltage and operating temperature. As an initial estimate, use the highest operating ambient temperature of interest and read rDS(on) from the typical characteristics graph. When VIN is lower than V(OVC), the TPS2500 is an traditional power switch. Using this value, the power dissipation can be calculated by usnig Equation 8.

Equation 8. PD = rDS(on) × IOUT2

When VIN exceed V(OVC), but lower than V(OVLO), the TPS25200 clamp output to fixed V(OVC), the power dissipation can be calculated by using Equation 9.

Equation 9. PD = (VIN – V(OVC)) × IOUT

where

  • PD = Total power dissipation (W)
  • rDS(on) = Power switch on-resistance (Ω)
  • V(OVC) = Overvoltage clamp voltage (V)
  • IOUT = Maximum current-limit threshold (A)

This step calculates the total power dissipation of the N-channel MOSFET.

Finally, calculate the junction temperature using Equation 10.

Equation 10. TJ = PD × θJA + TA

where

  • TA = Ambient temperature (°C)
  • θJA = Thermal resistance (°C /W)
  • PD = Total power dissipation (W)

Compare the calculated junction temperature with the initial estimate. If they are not within a few degrees, repeat the calculation using the "refined" rDS(on) from the previous calculation as the new estimate. Two or three iterations are generally sufficient to achieve the desired result. The final junction temperature is highly dependent on thermal resistance θJA, and thermal resistance is highly dependent on the individual package and board layout.