SLVSCJ0E March   2014  – June 2021 TPS25200

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Enable
      2. 8.3.2 Thermal Sense
      3. 8.3.3 Overcurrent Protection
      4. 8.3.4 FAULT Response
      5. 8.3.5 Output Discharge
    4. 8.4 Device Functional Modes
      1. 8.4.1 Undervoltage Lockout (UVLO)
      2. 8.4.2 Overcurrent Protection (OCP)
      3. 8.4.3 Overvoltage Clamp (OVC)
      4. 8.4.4 Overvoltage Lockout (OVLO)
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Step by Step Design Produce
        2. 9.2.2.2 Input and Output Capacitance
        3. 9.2.2.3 Programming the Current-Limit Threshold
        4. 9.2.2.4 Design Above a Minimum Current Limit
        5. 9.2.2.5 Design Below a Maximum Current Limit
        6. 9.2.2.6 Power Dissipation and Junction Temperature
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6.6 Timing Requirements

Conditions are –40°C ≤ TJ ≤ +125°C and 2.5 V ≤ VIN ≤ 6.5 V. VEN = VIN, RILIM = 33 kΩ. Positive current are into terminals. Typical value is at 25°C. All voltages are with respect to GND (unless otherwise noted)
TEST CONDITIONSMINTYPMAXUNIT
POWER SWITCH
trOUT voltage rise timeCL = 1 µF, RL = 100 Ω, (see Figure 7-2)2.053.2ms
tfOUT voltage fall time0.180.2
ENABLE INPUT EN
tonTurnon time2.5 V ≤ VIN ≤ 5 V, CL = 1 µF, RL = 100 Ω, (see Figure 7-2)5.127.3ms
toffTurnoff time0.220.3ms
CURRENT LIMIT
t(IOS)Short-circuit response timeVIN = 5 V (see Figure 7-4)3.5(1)µs
OVERVOLTAGE LOCKOUT, IN
t(OVLO_off_delay)Turnoff delay for OVLOVIN 5 V to 10 V with 1-V/µs ramp up rate, VOUT with 100-Ω load0.6(1)µs
FAULT FLAG
FAULT deglitchFAULT assertion or de-assertion due to overcurrent condition5812ms
(1) This parameter is provided for reference only and does not constitute part of TI's published device specifications for purposes of TI's product warranty.