SLUSCE3C October   2015  – August 2020 TPS2549-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Pin Configuration and Functions
  6. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Switching Characteristics
    7. 6.7 Typical Characteristics
  7. 7 Parameter Measurement Information
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  FAULT Response
      2. 8.3.2  Cable Compensation
        1. 8.3.2.1 Design Procedure
      3. 8.3.3  D+ and D– Protection
      4. 8.3.4  Output and D+ or D– Discharge
      5. 8.3.5  Port Power Management (PPM)
        1. 8.3.5.1 Benefits of PPM
        2. 8.3.5.2 PPM Details
        3. 8.3.5.3 Implementing PPM in a System With Two Charging Ports (CDP and SDP1)
        4. 8.3.5.4 Implementing PPM in a System With Two Charging Ports (DCP and DCP1)
      6. 8.3.6  CDP and SDP Auto Switch
      7. 8.3.7  Overcurrent Protection
      8. 8.3.8  Undervoltage Lockout
      9. 8.3.9  Thermal Sensing
      10. 8.3.10 Current Limit Setting
    4. 8.4 Device Functional Modes
      1. 8.4.1 Device Truth Table (TT)
      2. 8.4.2 USB Specification Overview
      3. 8.4.3 Standard Downstream Port (SDP) Mode — USB 2.0 and USB 3.0
      4. 8.4.4 Charging Downstream Port (CDP) Mode
      5. 8.4.5 Dedicated Charging Port (DCP) Mode
        1. 8.4.5.1 DCP BC1.2 and YD/T 1591-2009
        2. 8.4.5.2 DCP Divider-Charging Scheme
        3. 8.4.5.3 DCP 1.2-V Charging Scheme
      6. 8.4.6 DCP Auto Mode
      7. 8.4.7 Client Mode
      8. 8.4.8 High-Bandwidth Data-Line Switches
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Input and Output Capacitance
        2. 9.2.2.2 Cable Compensation Calculation
        3. 9.2.2.3 Power Dissipation and Junction Temperature
    3. 9.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Support Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.10 Current Limit Setting

The TPS2549-Q1 has two independent current-limit settings that are each programmed externally with a resistor. The ILIM_HI setting is programmed with R(ILIM_HI) connected between ILIM_HI and GND. The ILIM_LO setting is programmed with R(ILIM_LO) connected between ILIM_LO and GND. Consult the device truth table (Table 8-2) to see when each current limit is used. Both settings have the same relation between the current limit and the programming resistor.

R(ILIM_LO) is optional and the ILIM_LO pin may be left unconnected if the following conditions are met:

  • The TPS2549-Q1 device is configured as DCP(001) or CDP(111).
  • Load detection is not used.

The following equation calculates the value of resistor for programming the typical current limit:

Equation 3. GUID-3A43AFA0-5BC6-4452-BFC2-5580E3CA3E2E-low.gif

R(ILIM_xx) corresponds to either R(ILIM_HI) or R(ILIM_LO), as appropriate.

Many applications require that the current limit meet specific tolerance limits. When designing to these tolerance limits, both the tolerance of the TPS2549-Q1 current limit and the tolerance of the external programming resistor must be taken into account. The following equations approximate the TPS2549-Q1 minimum and maximum current limits to within a few milliamperes and are appropriate for design purposes. The equations do not constitute part of TI’s published device specifications for purposes of TI’s product warranty. These equations assume an ideal—no variation—external programming resistor. To take resistor tolerance into account, first determine the minimum and maximum resistor values based on its tolerance specifications and use these values in the equations. Because of the inverse relation between the current limit and the programming resistor, use the maximum resistor value in the I(OS_min) equation and the minimum resistor value in the I(OS_max) equation.

Equation 4. GUID-13F9A59D-CF60-4ABD-9768-F11F4183A1AA-low.gif
Equation 5. GUID-3AD0C4F3-4C2B-4C91-87E7-9C060FA7A409-low.gif
GUID-48089B67-A4A9-4342-9D93-19D184B67931-low.gifFigure 8-6 Current Limit Setting vs Programming Resistor I
GUID-33B3DCCF-B53C-40E6-B7F0-31C02BE5B83C-low.gifFigure 8-7 Current Limit Setting vs Programming Resistor II

The routing of the traces to the R(ILIM_xx) resistors should have a sufficiently low resistance so as to not affect the current-limit accuracy. The ground connection for the R(ILIM_xx) resistors is also very important. The resistors must reference back to the TPS2549-Q1 GND pin. Follow normal board layout practices to ensure that current flow from other parts of the board does not impact the ground potential between the resistors and the TPS2549-Q1 GND pin.