9.3.1 Overcurrent Conditions

The TPS255x and TPS255x-1 respond to overcurrent conditions by limiting their output current to the I_OS levels shown in Figure 23. When an overcurrent condition is detected, the device maintains a constant output current and reduces the output voltage accordingly. Two possible overload conditions can occur.

The first condition is when a short circuit or partial short circuit is present when the device is powered-up or enabled. The output voltage is held near zero potential with respect to ground and the TPS255x ramps the output current to I_OS. The TPS255x devices limits the current to I_OS until the overload condition is removed or the device begins to thermal cycle. The TPS255x-1 devices will limit the current to I_OS until the overload condition is removed or the internal deglitch time (7.5-ms typical) is reached and the device is turned off. The device remains off until power is cycled or the device enable is toggled.

The second condition is when a short circuit, partial short circuit, or transient overload occurs while the device is enabled and powered on. The device responds to the overcurrent condition within time t_IOS (see Figure 21). The current-sense amplifier is overdriven during this time and momentarily disables the internal current-limit MOSFET. The current-sense amplifier recovers and limits the output current to I_OS. Similar to the previous case, the TPS255x limits the current to I_OS until the overload condition is removed or the device begins to thermal cycle; the TPS255x-1 limits the current to I_OS until the overload condition is removed or the internal deglitch time is reached and the device is latched off.

The TPS255x thermal cycles if an overload condition is present long enough to activate thermal limiting in any of the above cases. The device turns off when the junction temperature exceeds 135°C (typical) while in current limit. The device remains off until the junction temperature cools 10°C (typical) and then restarts. The TPS255x cycles on and off until the overload is removed (see Figure 5 and Figure 7) .

9.3.2 Reverse-Voltage Protection

The reverse-voltage protection feature turns off the N-channel MOSFET whenever the output voltage exceeds the input voltage by 135 mV (typical) for 4-ms (typical). A reverse current of (V_OUT – V_IN)/r_DS(on)) are present when this occurs. This prevents damage to devices on the input side of the TPS255x and TPS2552-1/TPS2253-1 by preventing significant current from sinking into the input capacitance. The TPS255x devices allow the N-channel MOSFET to turn on once the output voltage goes below the input voltage for the same 4-ms deglitch time. The TPS255x-1 devices keep the device turned off even if the reverse-voltage condition is removed and do not allow the N-channel MOSFET to turn on until power is cycled or the device enable is toggled. The reverse-voltage comparator also asserts the FAULT output (active-low) after 4-ms.

9.3.3 FAULT Response

The FAULT open-drain output is asserted (active low) during an overcurrent, overtemperature, or reverse-voltage condition. The TPS255x asserts the FAULT signal until the fault condition is removed and the device resumes normal operation. The TPS255x-1 asserts the FAULT signal during a fault condition and remains asserted while the part is latched-off. The FAULT signal is de-asserted once device power is cycled or the enable is toggled and the device resumes normal operation. The TPS255x and TPS255x-1 are designed to eliminate false FAULT reporting by using an internal delay de-glitch circuit for overcurrent (7.5-ms typical) and reverse-voltage (4-ms typical) conditions without the need for external circuitry. This ensures that FAULT is not accidentally asserted due to normal operation such as starting into a heavy capacitive load. The deglitch circuitry delays entering and leaving fault conditions. Overtemperature conditions are not deglitched and assert the FAULT signal immediately.

9.3.4 Undervoltage Lockout (UVLO)

The undervoltage lockout (UVLO) circuit disables the power switch until the input voltage reaches the UVLO turnon threshold. Built-in hysteresis prevents unwanted on and off cycling due to input voltage drop from large current surges.

9.3.5 ENABLE (EN or EN)

The logic enable controls the power switch, bias for the charge pump, driver, and other circuits to reduce the supply current. The supply current is reduced to less than 1-µA when a logic low is present on EN. A logic low input on EN or a logic high input on EN enables the driver, control circuits, and power switch. The enable input is compatible with both TTL and CMOS logic levels.

9.3.6 Thermal Sense

The TPS255x and TPS255x-1 have self-protection features using two independent thermal-sensing circuits that monitor the operating temperature of the power switch and disable operation if the temperature exceeds recommended operating conditions. The TPS255x device operates in constant-current mode during an overcurrent conditions, which increases the voltage drop across power-switch. The power dissipation in the package is proportional to the voltage drop across the power switch, which increases the junction temperature during an overcurrent condition. The first thermal sensor turns off the power switch when the die temperature exceeds 135°C (minimum) and the part is in current limit. Hysteresis is built into the thermal sensor, and the switch turns on after the device has cooled approximately 10°C.

The TPS255x and TPS255x-1 also have a second ambient thermal sensor. The ambient thermal sensor turns off the power-switch when the die temperature exceeds 155°C (minimum) regardless of whether the power switch is in current limit and turns on the power switch after the device has cooled approximately 10°C. The TPS255x and TPS255x-1 families continue to cycle off and on until the fault is removed.

The open-drain fault reporting output FAULT is asserted (active low) immediately during an overtemperature shutdown condition.

9.5.1 Programming the Current-Limit Threshold

The overcurrent threshold is user programmable through an external resistor. The TPS255x and TPS255x-1 use an internal regulation loop to provide a regulated voltage on the ILIM pin. The current-limit threshold is proportional to the current sourced out of ILIM. The recommended 1% resistor range for R_ILIM is 15 kΩ ≤ R_ILIM ≤ 232 kΩ to ensure stability of the internal regulation loop. Many applications require that the minimum current limit is above a certain current level or that the maximum current limit is below a certain current level, so it is important to consider the tolerance of the overcurrent threshold when selecting a value for R_ILIM. The following equations and Figure 23 can be used to calculate the resulting overcurrent threshold for a given external resistor value (R_ILIM). Figure 23 includes current-limit tolerance due to variations caused by temperature and process. However, the equations do not account for tolerance due to external resistor variation, so it is important to account for this tolerance when selecting R_ILIM. The traces routing the R_ILIM resistor to the TPS255x and TPS255x-1 must be as short as possible to reduce parasitic effects on the current-limit accuracy.

R_ILIM can be selected to provide a current-limit threshold that occurs 1) above a minimum load current or 2) below a maximum load current.

To design above a minimum current-limit threshold, find the intersection of R_ILIM and the maximum desired load current on the I_OS(min) curve and choose a value of R_ILIM below this value. Programming the current limit above a minimum threshold is important to ensure start-up into full load or heavy capacitive loads. The resulting maximum current-limit threshold is the intersection of the selected value of R_ILIM and the I_OS(max) curve.

To design below a maximum current-limit threshold, find the intersection of R_ILIM and the maximum desired load current on the I_OS(max) curve and choose a value of R_ILIM above this value. Programming the current limit below a maximum threshold is important to avoid current limiting upstream power supplies, causing the input voltage bus to droop. The resulting minimum current-limit threshold is the intersection of the selected value of R_ILIM and the I_OS(min) curve.

Current-Limit Threshold Equations (I_OS):

Equation 1.

where

While the maximum recommended value of RILIM is 232 kΩ, there is one additional configuration that allows for a lower current-limit threshold. The ILIM pin may be connected directly to IN to provide a 75 mA (typical) current-limit threshold. Additional low-ESR ceramic capacitance may be necessary from IN to GND in this configuration to prevent unwanted noise from coupling into the sensitive ILIM circuitry.

Figure 23. Current-Limit Threshold vs R_ILIM