SLVSCC6A March   2014  – June 2014 TPS2561A-Q1

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Functions and Configurations
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 Handling Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Typical Characteristics
  8. 8 Parameter Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Overcurrent Conditions
      2. 9.3.2 FAULTx Response
      3. 9.3.3 Thermal Sense
    4. 9.4 Device Functional Mode
      1. 9.4.1 Undervoltage Lockout (UVLO)
      2. 9.4.2 Enable (ENx)
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Current Limit
        1. 10.2.1.1 Design Requirements
        2. 10.2.1.2 Detailed Design Procedure
          1. 10.2.1.2.1 Determine Design Parameters
          2. 10.2.1.2.2 Programming the Current-Limit Threshold
          3. 10.2.1.2.3 Designing Above a Minimum Current Limit
          4. 10.2.1.2.4 Designing Below a Maximum Current Limit
          5. 10.2.1.2.5 Accounting for Resistor Tolerance
          6. 10.2.1.2.6 Power Dissipation and Junction Temperature
          7. 10.2.1.2.7 Auto-Retry Functionality
          8. 10.2.1.2.8 Two-Level Current-Limit Circuit
      2. 10.2.2 Application Curves
  11. 11Power Supply Requirements
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Trademarks
    2. 13.2 Electrostatic Discharge Caution
    3. 13.3 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

6 Pin Functions and Configurations

DRC PACKAGE
(TOP VIEW)
po_slvscc6.gif

Pin Functions

PIN I/O DESCRIPTION
NAME NUMBER
EN1 4 I Enable input, logic high turns on channel one power switch
EN2 5 I Enable input, logic high turns on channel two power switch
GND 1 Ground connection; connect externally to PowerPAD
IN 2, 3 I Input voltage; connect a 0.1 μF or greater ceramic capacitor from IN to GND as close to the IC as possible.
FAULT1 10 O Active-low open-drain output, asserted during overcurrent or overtemperature condition on channel one.
FAULT2 6 O Active-low open-drain output, asserted during overcurrent or overtemperature condition on channel two
OUT1 9 O Power-switch output for channel one
OUT2 8 O Power-switch output for channel two
ILIM 7 O External resistor used to set current-limit threshold; recommended 20 kΩ ≤ RILIM ≤ 187 kΩ.
PowerPAD™ PAD Internally connected to GND; used to heat-sink the part to the circuit board traces. Connect PowerPAD to GND pin externally.