SLVSH93A October   2023  – March 2024 TPS25751

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
      1. 6.1.1 TPS25751D and TPS25751S - Absolute Maximum Ratings
      2. 6.1.2 TPS25751D - Absolute Maximum Ratings
      3. 6.1.3 TPS25751S - Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
      1. 6.3.1 TPS25751D - Recommended Operating Conditions
      2. 6.3.2 TPS25751S - Recommended Operating Conditions
    4. 6.4  Recommended Capacitance
    5. 6.5  Thermal Information
      1. 6.5.1 TPS25751D - Thermal Information
      2. 6.5.2 TPS25751S - Thermal Information
    6. 6.6  Power Supply Characteristics
    7. 6.7  Power Consumption
    8. 6.8  PP_5V Power Switch Characteristics
    9. 6.9  PPHV Power Switch Characteristics - TPS25751D
    10. 6.10 PP_EXT Power Switch Characteristics - TPS25751S
    11. 6.11 Power Path Supervisory
    12. 6.12 CC Cable Detection Parameters
    13. 6.13 CC VCONN Parameters
    14. 6.14 CC PHY Parameters
    15. 6.15 Thermal Shutdown Characteristics
    16. 6.16 ADC Characteristics
    17. 6.17 Input/Output (I/O) Characteristics
    18. 6.18 BC1.2 Characteristics
    19. 6.19 I2C Requirements and Characteristics
    20. 6.20 Typical Characteristics
  8. 7 Parameter Measurement Information
  9. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1  USB-PD Physical Layer
        1. 8.3.1.1 USB-PD Encoding and Signaling
        2. 8.3.1.2 USB-PD Bi-Phase Marked Coding
        3. 8.3.1.3 USB-PD Transmit (TX) and Receive (Rx) Masks
        4. 8.3.1.4 USB-PD BMC Transmitter
        5. 8.3.1.5 USB-PD BMC Receiver
        6. 8.3.1.6 Squelch Receiver
      2. 8.3.2  Power Management
        1. 8.3.2.1 Power-On And Supervisory Functions
        2. 8.3.2.2 VBUS LDO
      3. 8.3.3  Power Paths
        1. 8.3.3.1 Internal Sourcing Power Paths
          1. 8.3.3.1.1 PP_5V Current Clamping
          2. 8.3.3.1.2 PP_5V Local Overtemperature Shut Down (OTSD)
          3. 8.3.3.1.3 PP_5V OVP
          4. 8.3.3.1.4 PP_5V UVLO
          5. 8.3.3.1.5 PP_5Vx Reverse Current Protection
          6. 8.3.3.1.6 PP_CABLE Current Clamp
          7. 8.3.3.1.7 PP_CABLE Local Overtemperature Shut Down (OTSD)
          8. 8.3.3.1.8 PP_CABLE UVLO
        2. 8.3.3.2 TPS25751D Internal Sink Path
          1. 8.3.3.2.1 Overvoltage Protection (OVP)
          2. 8.3.3.2.2 Reverse-Current Protection (RCP)
          3. 8.3.3.2.3 VBUS UVLO
          4. 8.3.3.2.4 Discharging VBUS to Safe Voltage
        3. 8.3.3.3 TPS25751S - External Sink Path Control PP_EXT
          1. 8.3.3.3.1 Overvoltage Protection (OVP)
            1. 8.3.3.3.1.1 Reverse-Current Protection (RCP)
            2. 8.3.3.3.1.2 VBUS UVLO
            3. 8.3.3.3.1.3 Discharging VBUS to Safe Voltage
      4. 8.3.4  Cable Plug and Orientation Detection
        1. 8.3.4.1 Configured as a Source
        2. 8.3.4.2 Configured as a Sink
        3. 8.3.4.3 Configured as a DRP
        4. 8.3.4.4 Dead Battery Advertisement
      5. 8.3.5  Overvoltage Protection (CC1, CC2)
      6. 8.3.6  Default Behavior Configuration (ADCIN1, ADCIN2)
      7. 8.3.7  ADC
      8. 8.3.8  BC 1.2 (USB_P, USB_N)
      9. 8.3.9  Digital Interfaces
        1. 8.3.9.1 General GPIO
        2. 8.3.9.2 I2C Interface
      10. 8.3.10 Digital Core
      11. 8.3.11 I2C Interface
        1. 8.3.11.1 I2C Interface Description
          1. 8.3.11.1.1 I2C Clock Stretching
          2. 8.3.11.1.2 I2C Address Setting
          3. 8.3.11.1.3 Unique Address Interface
    4. 8.4 Device Functional Modes
      1. 8.4.1 Pin Strapping to Configure Default Behavior
      2. 8.4.2 Power States
    5. 8.5 Thermal Shutdown
  10. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
        1. 9.2.1.1 Programmable Power Supply (PPS) - Design Requirements
        2. 9.2.1.2 Liquid Detection Design Requirements
        3. 9.2.1.3 BC1.2 Application Design Requirements
        4. 9.2.1.4 USB Data Support Design Requirements
      2. 9.2.2 Detailed Design Procedure
        1. 9.2.2.1 Programmable Power Supply (PPS)
        2. 9.2.2.2 Liquid Detection
          1. 9.2.2.2.1 Liquid Detection Operation
        3. 9.2.2.3 BC1.2 Application
        4. 9.2.2.4 USB Data Support
      3. 9.2.3 Application Curves
        1. 9.2.3.1 Programmable Power Supply (PPS) Application Curves
        2. 9.2.3.2 Liquid Detection Application Curves
        3. 9.2.3.3 BC1.2 Application Curves
        4. 9.2.3.4 USB Data Support Application Curves
    3. 9.3 Power Supply Recommendations
      1. 9.3.1 3.3-V Power
        1. 9.3.1.1 VIN_3V3 Input Switch
      2. 9.3.2 1.5-V Power
      3. 9.3.3 Recommended Supply Load Capacitance
    4. 9.4 Layout
      1. 9.4.1 TPS25751D - Layout
        1. 9.4.1.1 Layout Guidelines
          1. 9.4.1.1.1 Recommended Via Size
          2. 9.4.1.1.2 Minimum Trace Widths
        2. 9.4.1.2 Layout Example
          1. 9.4.1.2.1 TPS25751D Schematic Layout Example
          2. 9.4.1.2.2 TPS25751D Layout Example - PCB Plots
            1. 9.4.1.2.2.1 TPS25751D Component Placement
            2. 9.4.1.2.2.2 TPS25751D PP5V
            3. 9.4.1.2.2.3 TPS25751D PPHV
            4. 9.4.1.2.2.4 TPS25751D VBUS
            5. 9.4.1.2.2.5 TPS25751D I/O (I2C, ADCINs, GPIOs)
            6. 9.4.1.2.2.6 TPS25751D DRAIN
            7. 9.4.1.2.2.7 TPS25751D GND
      2. 9.4.2 TPS25751S - Layout
        1. 9.4.2.1 Layout Guidelines
          1. 9.4.2.1.1 Recommended Via Size
          2. 9.4.2.1.2 Minimum Trace Widths
        2. 9.4.2.2 Layout Example
          1. 9.4.2.2.1 TPS25751S Schematic Layout Example
          2. 9.4.2.2.2 TPS25751S Layout Example - PCB Plots
            1. 9.4.2.2.2.1 TPS25751S Component Placement
            2. 9.4.2.2.2.2 TPS25751S PP5V
            3. 9.4.2.2.2.3 TPS25751S PP_EXT
            4. 9.4.2.2.2.4 TPS25751S VBUS
            5. 9.4.2.2.2.5 TPS25751S I/O
            6. 9.4.2.2.2.6 TPS25751S PPEXT Gate Driver
            7. 9.4.2.2.2.7 TPS25751S GND
  11. 10Device and Documentation Support
    1. 10.1 Device Support
      1. 10.1.1 Third-Party Products Disclaimer
      2. 10.1.2 Firmware Warranty Disclaimer
    2. 10.2 Documentation Support
      1. 10.2.1 Related Documentation
    3. 10.3 Receiving Notification of Documentation Updates
    4. 10.4 Support Resources
    5. 10.5 Trademarks
    6. 10.6 Electrostatic Discharge Caution
    7. 10.7 Glossary
  12. 11Revision History
  13. 12Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

5 Pin Configuration and Functions

GUID-20231010-SS0I-XFQ4-GQZ8-VM4RRPP4V8SP-low.svg Figure 5-1 Top View of the TPS25751D 38-pin QFN Package

GUID-20231010-SS0I-6NH1-WRNQ-PMTMTS0XPVQN-low.svg Figure 5-2 Top View of the TPS25751S 32-pin QFN Package
Table 5-1 TPS25751D Pin Functions
PINTYPE(1)RESETDESCRIPTION
NAMENO.
ADCIN12IHi-ZConfiguration Input. Connect to a resistor divider to LDO_3V3.
ADCIN23IHi-ZConfiguration Input. Connect to a resistor divider to LDO_3V3.
CC128I/OHi-ZI/O for USB Type-C. Filter noise with recommended capacitor to GND (CCCy).
CC229I/OHi-ZI/O for USB Type-C. Filter noise with recommended capacitor to GND (CCCy).
GND11, 12, 14, 31——Ground. Connect to ground plane.
GPIO05GPIOHi-ZGeneral purpose digital I/O. Tie to ground when pin is unused.
GPIO16GPIOHi-ZGeneral purpose digital I/O. Tie to ground when pin is unused.
GPIO27GPIOHi-ZGeneral purpose digital I/O. Tie to ground when pin is unused.
GPIO319GPIOHi-ZGeneral purpose digital I/O. Tie to ground when pin is unused.
GPIO4/USB_P/LD126 GPIOHi-ZGeneral purpose digital I/O. Tie to ground when unused. Pin can be connected to D+ for BC1.2 support. Pin can be connected for liquid detection on the Type-C connector. Tie to ground when pin is unused.
GPIO5/USB_N/LD227GPIOHi-ZGeneral purpose digital I/O. Tie to ground when unused. Pin can be connected to D- for BC1.2 support. Pin can be connected for liquid detection on the Type-C connector. Tie to ground when pin is unused.
GPIO637GPIOHi-ZGeneral purpose digital I/O. Tie to ground when pin is unused.
GPIO736GPIOHi-ZGeneral purpose digital I/O. Tie to ground when pin is unused.
I2Ct_SCL9IHi-ZI2C target serial clock input. Tie to pullup voltage through a resistor. May be grounded if unused.
I2Ct_SDA8I/OHi-ZI2C target serial data. Open-drain input/output. Tie to pullup voltage through a resistor. May be grounded if unused.
I2Ct_IRQ10OHi-ZI2C target interrupt. Active low. Connect to external voltage through a pull-up resistor. Pin can be re-configured to GPIO10. Tie to ground if unused.
I2Cc_SCL17OHi-ZI2C controller serial clock. Open-drain output. Tie to pullup voltage through a resistor. Can be grounded if unused.
GPIO1113GPIOHi-ZGeneral purpose digital I/O. Tie to ground when pin is unused.
I2Cc_SDA16I/OHi-ZI2C controller serial data. Open-drain input/output. Tie to pullup voltage through a resistor. Can be grounded if unused.
I2Cc_IRQ18IHi-ZI2C controller interrupt. Active low. Connect to external voltage through a pull-up resistor. Do NOT tie to GND when unused. Pin can be re-configured to GPIO12.
LDO_1V54O—Output of the CORE LDO. Bypass with capacitance CLDO_1V5 to GND. Pin cannot source current to external circuits.
LDO_3V31O—Output of supply switched from VIN_3V3 or VBUS LDO. Bypass with capacitance CLDO_3V3 to GND.
DRAIN15, 30N/A—Connects to drain of internal FET.
PP5V34, 35I—5-V System Supply to VBUS, supply for CCy pins as VCONN.
PPHV20, 21, 22I/OHigh-voltage sinking node in the system.
VBUS_IN23, 24, 25

I/O

5-V to 20-V input.
VBUS32, 33O5-V output from PP5V input to LDO. Bypass with capacitance CVBUS to GND.
VIN_3V338I—Supply for core circuitry and I/O. Bypass with capacitance CVIN_3V3 to GND.
(1) I = input, O = output, I/O = input and output, GPIO = general purpose digital input and output
Table 5-2 TPS25751S Pin Functions
PINTYPE(1)RESETDESCRIPTION
NAMENO.
ADCIN12IHi-ZConfiguration Input. Connect to a resistor divider to LDO_3V3.
ADCIN23IHi-ZConfiguration Input. Connect to a resistor divider to LDO_3V3.
CC124I/OHi-ZI/O for USB Type-C. Filter noise with recommended capacitor to GND (CCCy).
CC225I/OHi-ZI/O for USB Type-C. Filter noise with recommended capacitor to GND (CCCy).
GATE_VSYS20OHi-ZConnect to the N-ch MOSFET that has source tied to VSYS.
GATE_VBUS21OHi-ZConnect to the N-ch MOSFET that has source tied to VBUS.
GND11, 12, 14——Ground. Connect to ground plane.
GPIO05 GPIOHi-ZGeneral purpose digital I/O. Tie to ground when pin is unused.
GPIO16 GPIOHi-ZGeneral purpose digital I/O. Tie to ground when pin is unused.
GPIO27 GPIOHi-ZGeneral purpose digital I/O. Tie to ground when pin is unused.
GPIO318 GPIOHi-ZGeneral purpose digital I/O. Tie to ground when pin is unused.
GPIO4/USB_P/LD122 GPIOHi-ZGeneral purpose digital I/O. Tie to ground when unused. Pin can be connected to D+ for BC1.2 support. Pin can be connected for liquid detection on the Type-C connector. Tie to ground when pin is unused.
GPIO5/USB_N/LD223 GPIOHi-ZGeneral purpose digital I/O. Tie to ground when unused. Pin can be connected to D- for BC1.2 support. Pin can be connected for liquid detection on the Type-C connector. Tie to ground when pin is unused.
GPIO631 GPIOHi-ZGeneral purpose digital I/O. Tie to ground when pin is unused.
GPIO730 GPIOHi-ZGeneral purpose digital I/O. Tie to ground when pin is unused.
I2Ct_SCL9IHi-ZI2C target serial clock input. Tie to pullup voltage through a resistor. May be grounded if unused.
I2Ct_SDA8I/OHi-ZI2C target serial data. Open-drain input/output. Tie to pullup voltage through a resistor. May be grounded if unused.
I2Ct_IRQ10OHi-ZI2C target interrupt. Active low. Connect to external voltage through a pull-up resistor. Pin can be re-configured to GPIO10. Tie to ground when unused.
I2Cc_SCL16OHi-ZI2C controller serial clock. Open-drain output. Tie to pullup voltage through a resistor when used or unused.
GPIO1113GPIOHi-ZGeneral purpose digital I/O. Tie to ground when pin is unused.
I2Cc_SDA15I/OHi-ZI2C controller serial data. Open-drain input/output. Tie to pullup voltage through a resistor when used or unused.
I2Cc_IRQ17IHi-ZI2C controller interrupt. Active low. Connect to external voltage through a pull-up resistor. Do NOT tie to GND when unused. Pin can be re-configured to GPIO12.
LDO_1V54O—Output of the CORE LDO. Bypass with capacitance CLDO_1V5 to GND. Pin cannot source current to external circuits.
LDO_3V31O—Output of supply switched from VIN_3V3 or VBUS LDO. Bypass with capacitance CLDO_3V3 to GND.
PP5V28, 29I—5-V System Supply to VBUS, supply for CCy pins as VCONN.
VSYS19I—High-voltage sinking node in the system. Pin is used to implement reverse-current-protection (RCP) for the external sinking paths controlled by GATE_VSYS.
VBUS26, 27I/O5-V to 20-V input. Bypass with capacitance CVBUS to GND.
VIN_3V332I—Supply for core circuitry and I/O. Bypass with capacitance CVIN_3V3 to GND.
(1) I = input, O = output, I/O = input and output, GPIO = general purpose digital input and output