SBVS426A
December 2022 – September 2023
TPS25772-Q1
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Revision History
5
Device Comparison Table
6
Pin Configuration and Functions
7
Specifications
7.1
Absolute Maximum Ratings
7.2
ESD Ratings
7.3
Recommended Operating Conditions
7.4
Recommended Components
7.5
Thermal Information
7.6
Buck-Boost Regulator
7.7
CC Cable Detection Parameters
7.8
CC VCONN Parameters
7.9
CC PHY Parameters
7.10
Thermal Shutdown Characteristics
7.11
Oscillator Characteristics
7.12
ADC Characteristics
7.13
TVS Parameters
7.14
Input/Output (I/O) Characteristics
7.15
BC1.2 Characteristics
7.16
I2C Requirements and Characteristics
7.17
Typical Characteristics
8
Parameter Measurement Information
9
Detailed Description
9.1
Overview
9.2
Functional Block Diagram
9.3
Feature Description
9.3.1
Device Power Management and Supervisory Circuitry
9.3.1.1
VIN UVLO and Enable/UVLO
9.3.1.2
Internal LDO Regulators
9.3.2
TVSP Device Configuration and ESD Protection
9.3.3
Buck-Boost Regulator
9.3.3.1
Buck-Boost Regulator Operation
9.3.3.2
Switching Frequency, Frequency Dither, Phase-Shift and Synchronization
9.3.3.3
VIN Supply and VIN Over-Voltage Protection
9.3.3.4
Feedback Paths and Error Amplifiers
9.3.3.5
Transconductors and Compensation
9.3.3.6
Output Voltage DAC, Soft-Start and Cable Droop Compensation
9.3.3.7
VBUS Overvoltage Protection
9.3.3.8
VBUS Undervoltage Protection
9.3.3.9
Current Sense Resistor (RSNS) and Current Limit Operation
9.3.3.10
Buck-Boost Peak Current Limits
9.3.4
USB-PD Physical Layer
9.3.4.1
USB-PD Encoding and Signaling
9.3.4.2
USB-PD Bi-Phase Marked Coding
9.3.4.3
USB-PD Transmit (TX) and Receive (Rx) Masks
9.3.4.4
USB-PD BMC Transmitter
9.3.4.5
USB-PD BMC Receiver
9.3.4.6
Squelch Receiver
9.3.5
VCONN
9.3.6
Cable Plug and Orientation Detection
9.3.6.1
Configured as a Source
9.3.6.2
Configured as a Sink
9.3.6.3
Overvoltage Protection (Px_CC1, Px_CC2)
9.3.7
ADC
9.3.7.1
ADC Divider Ratios
9.3.8
BC 1.2, Legacy and Fast Charging Modes (Px_DP, Px_DM)
9.3.9
USB2.0 Low-Speed Endpoint
9.3.10
Digital Interfaces
9.3.10.1
General GPIO
9.3.10.2
I2C Buffer
9.3.11
I2C Interface
9.3.11.1
I2C Interface Description
9.3.11.2
I2C Clock Stretching
9.3.11.3
I2C Address Setting
9.3.11.4
Unique Address Interface
9.3.11.5
I2C Pullup Resistor Calculation
9.3.12
Digital Core
9.3.12.1
Device Memory
9.3.12.2
Core Microprocessor
9.3.13
NTC Input
9.3.14
Thermal Sensors and Thermal Shutdown
9.4
Device Functional Modes
10
Application and Implementation
10.1
Application Information
10.2
Typical Application
10.2.1
Design Requirements
10.2.2
Detailed Design Procedure
10.2.2.1
Application GUI Selections
10.2.2.2
EEPROM Selection
10.2.2.3
EN/UVLO
10.2.2.4
Sense Resistor, RSNS, RCSP, RCSN and CFILT
10.2.2.5
Inductor Currents
10.2.2.6
Output Capacitor
10.2.2.7
Input Capacitor
10.2.3
Application Curves
10.3
Power Supply Recommendations
10.4
Layout
10.4.1
Layout Guidelines
10.4.2
Layout Example
11
Device and Documentation Support
11.1
Documentation Support
11.1.1
Related Documentation
11.2
Receiving Notification of Documentation Updates
11.3
Support Resources
11.4
Trademarks
11.5
Electrostatic Discharge Caution
11.6
Glossary
12
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RQL|29
MPQF570A
Thermal pad, mechanical data (Package|Pins)
RQL|29
QFND612
Orderable Information
sbvs426a_oa
sbvs426a_pm
1
Features
AEC-Q100 qualified with the following results:
Device temperature grade 1: –40°C to +125°C ambient operating temperature range
Device HBM ESD classification level 2
Device CDM ESD classification level C2b
Enhanced connector pin ESD protection
USB Power Delivery (PD) controller with Programmable Power Supply (PPS) support
Wide V
IN
: 5.5 V to 18 V (40-V maximum)
Integrated buck-boost 4 power switches supporting up to
65-W
USB PD output power
V
BUS
output: 3–21 V with ±20-mV step size
I
BUS
output: 0–3 A with ±50-mA current limit step size
V
BUS
short circuit to V
BAT
and GND protection
V
BUS
cable droop compensation
MFi overcurrent protection
Switching frequency: 300, 400, 450 kHz
DC/DC sync in/out with dithering
USB port configurations options
1 USB-PD Port (TPS25762-Q1)
2 USB-PD Ports (TPS25772-Q1)
Compliant to USB
USB Type-C®
Power Delivery Rev 3.1
TPS25762-Q1: USB–IF certification with PPS, TID: 9509
TPS25772-Q1: USB–IF certification with PPS, TID: 9161
CC logic, V
CONN
source and discharge
USB cable polarity detection
Battery charging specification rev 1.2
DCP: Dedicated Charging Port
Legacy Fast Charging
2.7-V divider-3 mode
1.2-V divider mode
High Voltage DCP Protocol
Microcontroller core allows
Firmware updates
Intelligent power sharing across charging ports
Supply voltage and temperature-dependent power management
Short to V
BUS
and V
BAT
protection
V
BUS
Px_ DP and Px_DM
Px_CC1 and Px_CC2
HotRod™
QFN package with wettable flank