SLVSCR1C September 2015 – July 2017 TPS25810
PRODUCTION DATA.
NOTE
Information in the following applications sections is not part of the TI component specification, and TI does not warrant its accuracy or completeness. TI’s customers are responsible for determining suitability of components for their purposes. Customers should validate and test their design implementation to confirm system functionality.
The TPS25810 is a Type-C DFP controller that supports all Type-C DFP required functions. The TPS25810 only applies power to VBUS when it detects that a UFP is attached and removes power when it detects the UFP is detached. The device exposes its identity via its CC pin advertising its current capability based on CHG and CHG_HI pin settings. The TPS25810 also limits its advertised current internally and provides robust protection to a fault on the system VBUS power rail.
After a connection is established by the TPS25810, the device is capable of providing VCONN to power circuits in the cable plug on the CC pin that is not connected to the CC wire in the cable. VCONN is internally current limited and has its own supply pin IN2. Apart from providing charging current to a UFP, the TPS25810 also supports Audio and Debug accessory modes.
The following design procedure can be used to implement a full featured Type-C DFP.
NOTE
BC 1.2 is not supported in the TPS25810. To support BC1.2 with Type-C charging modes in a single C connector, a device like a TPS2514A will need to be used.
Figure 20 shows a minimal Type-C DFP implementation capable of supporting 5-V and 3-A charging.
Input and output capacitance improves the performance of the device. The actual capacitance should be optimized for the particular application. For all applications, a 0.1-μF or greater ceramic bypass capacitor between IN and GND is recommended as close to the device as possible for local noise de-coupling.
All protection circuits such as the TPS25810 have the potential for input voltage overshoots and output voltage undershoots. Input voltage overshoots can be caused by either of two effects. The first cause is an abrupt application of input voltage in conjunction with input power bus inductance and input capacitance when the IN terminal is high impedance (before turn on). Theoretically, the peak voltage is 2 times the applied. The second cause is due to the abrupt reduction of output short circuit current when the TPS25810 turns off and energy stored in the input inductance drives the input voltage high. Input voltage droops may also occur with large load steps and as the TPS25810 output is shorted. Applications with large input inductance (for instance connecting the evaluation board to the bench power-supply through long cables) may require large input capacitance to reduce the voltage overshoot from exceeding the absolute maximum voltage of the device.
The fast current-limit speed of the TPS25810 to hard output short circuits isolate the input bus form faults. However, ceramic input capacitance in the range of 1 μF to 22 μF adjacent to the TPS25810 input aids in both response time and limiting the transient seen on the input power bus. Momentary input transients to 6.5 V are permitted. Output voltage undershoot is caused by the inductance of the output power bus just after a short has occurred and the TPS25810 has abruptly reduced OUT current. Energy stored in the inductance drives the OUT voltage down and potentially negative as it discharges. An application with large output inductance (such as from a cable) benefits from use of a high-value output capacitor to control voltage undershoot.
When implementing a USB standard application, 120 μF minimum output capacitance is required. Typically a 150-μF electrolytic capacitor is used, which is sufficient to control voltage undershoots. Since in Type-C DFP is a cold socket when no UFP is attached, the output capacitance should be placed at the IN pin versus OUT as is used in USB Type A ports. It is also recommended to put a 10-μF ceramic capacitor on the OUT pin for better voltage bypass.
The TPS25810 device supports three different input voltages based on the application. In the simplest implementation all input supplies are tied to a single voltage source as shown in Figure 20 which is set to 5 V. However, it is recommended to set a slightly higher (100 mV to 200 mV) input voltage, when possible, to compensate for IR drop from the source to the Type C connector.
Other design considerations are listed below:
Basic Start-Up: IN1 = IN2 = AUX = EN = CHG = CHG_HI = 5 V, CC1 = Rd, CC2 = Open | ||
IN1 = IN2 = AUX = EN = 5 V; CHG = CHG_HI = 0 V, CC1 = Open, CC2 = Rd, OUT = Open→5 Ω | ||
IN1 = IN2 = AUX = EN = CHG = CHG_HI = 5 V, CC1 = Short, CC2 = Rd | ||
VIN 5 V→3.5 V (100 ms)→5 V (1 V/ms), | ||||
IN1 = IN2 = AUX = EN = CHG = CHG_HI = 5 V, | ||||
CC1 = Rd, CC2 = Ra |
IN1 = IN2 = AUX = EN = CHG = CHG_HI = 5 V, CC1 = Open, CC2 = Open then Rd | ||
IN1 = IN2 = AUX = EN = CHG = CHG_HI = 5 V, CC1 = Rd, CC2 = Open, OUT = Shorted | ||
IN1 = IN2 = AUX = EN = CHG = CHG_HI = 5 V, CC1 = Open, CC2 = Rd→Open | ||
Figure 28 shows a Type-C DFP implementation capable of supporting 5 V and 3 A charging in a Type-C port that is also able to support charging of legacy devices when used with a Type C – µB cable assembly for charging phones and handheld devices equipped with µB connector.
This implementation requires the use of a TPS2514A, a USB dedicated charging port (DCP) controller with auto-detect feature to charge not only BC1.2 compliant handheld devices but also popular phones and tablets that incorporate their own propriety charging algorithm. Refer to TPS2514A specifications available at www.ti.com for more details.
Refer to Design Requirements for the Design Requirements.
Refer to Detailed Design Procedure for the Detailed Design Procedure.
Refer to Application Curves for the Application Curves.