SLVSEG3E
September 2019 – March 2022
TPS25840-Q1
,
TPS25842-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Description (Continued)
6
Device Comparison Table
7
Pin Configuration and Functions
8
Specifications
8.1
Absolute Maximum Ratings
8.2
ESD Ratings
8.3
Recommended Operating Conditions
8.4
Thermal Information
8.5
Electrical Characteristics
8.6
Timing Requirements
8.7
Switching Characteristics
8.8
Typical Characteristics
9
Parameter Measurement Information
10
Detailed Description
10.1
Overview
10.2
Functional Block Diagram
10.3
Feature Description
10.3.1
Buck Regulator
10.3.2
Enable/UVLO
10.3.3
Switching Frequency and Synchronization (RT/SYNC)
10.3.4
Spread-Spectrum Operation
10.3.5
VCC, VCC_UVLO
10.3.6
Minimum ON-time, Minimum OFF-time
10.3.7
Internal Compensation
10.3.8
Bootstrap Voltage (BOOT)
10.3.9
RSNS, RSET, RILIMIT and RIMON
10.3.10
Overcurrent and Short Circuit Protection
10.3.10.1
Current Limit Setting using RILIMIT
10.3.10.2
Buck Average Current Limit Design Example
10.3.10.3
External MOSFET Gate Drivers
10.3.10.4
Cycle-by-Cycle Buck Current Limit
10.3.11
Overvoltage, IEC and Short-to-Battery Protection
10.3.11.1
V BUS and V CSN/OUT Overvoltage Protection
10.3.11.2
DP_IN and DM_IN Protection
10.3.12
Cable Compensation
10.3.12.1
Cable Compensation Design Example
10.3.13
USB Port Control
10.3.14
FAULT Response
10.3.15
USB Specification Overview
10.3.16
Device Power Pins (IN, CSN/OUT, and PGND)
10.3.17
Thermal Shutdown
10.4
Device Functional Modes
10.4.1
Shutdown Mode
10.4.2
Active Mode
10.4.3
Device Truth Table (TT)
10.4.4
USB Port Operating Modes
10.4.4.1
Standard Downstream Port (SDP) Mode — USB 2.0, USB 3.0, and USB 3.1
10.4.4.2
Charging Downstream Port (CDP) Mode
10.4.4.3
Client Mode
10.4.5
High-bandwidth Data-line Switches
11
Application and Implementation
11.1
Application Information
11.2
Typical Application
11.2.1
Design Requirements
11.2.2
Detailed Design Procedure
11.2.2.1
Output Voltage
11.2.2.2
Switching Frequency
11.2.2.3
Inductor Selection
11.2.2.4
Output Capacitor Selection
11.2.2.5
Input Capacitor Selection
11.2.2.6
Bootstrap Capacitor Selection
11.2.2.7
VCC Capacitor Selection
11.2.2.8
Enable and Under Voltage Lockout Set-Point
11.2.2.9
Current Limit Set-Point
11.2.2.10
Cable Compensation Set-Point
11.2.2.11
FAULT Resistor Selection
11.2.3
Application Curves
12
Power Supply Recommendations
13
Layout
13.1
Layout Guidelines
13.2
Ground Plane and Thermal Considerations
13.3
Layout Example
14
Device and Documentation Support
14.1
Documentation Support
14.1.1
Related Documentation
14.2
Related Links
14.3
Receiving Notification of Documentation Updates
14.4
Support Resources
14.5
Trademarks
14.6
Electrostatic Discharge Caution
14.7
Glossary
15
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RHB|32
MPQF130D
Thermal pad, mechanical data (Package|Pins)
RHB|32
QFND592
Orderable Information
slvseg3e_oa
slvseg3e_pm
1
Features
AEC-Q100 qualified for automotive applications:
Temperature grade 1: –40°C to +125°C, T
A
HBM ESD Classification level H2
CDM ESD Classification level C5
Functional Safety-Capable
Documentation available to aid functional safety system design
Synchronous Buck DC/DC regulator
Input voltage range: 4.5 V to 36 V
Output current: 3.5 A
5.1-V output voltage with ±1% accuracy
Current mode control
Adjustable frequency: 300 kHz to 2.2 MHz
Frequency synchronization to external clock
FPWM with spread-spectrum dithering
Internal compensation for ease of use
Compliant to USB-IF standards
CDP/SDP mode per USB BC1.2
Optimized for USB power and communication
User-programmable USB current limit
Cable droop compensation up to 1.5 V
High bandwidth data switches on DP and DM
Client mode for system update
Integrated protection
V
BUS
Short-to-V
BAT
protection
DP_IN and DM_IN Short-to-V
BAT
(TPS25840-Q1 only)
DP_IN and DM_IN Short-to-V
BUS
DP_IN, DM_IN IEC 61000-4-2 rated
±8-kV contact and ±15-kV air discharge
Fault flag reports
32-pin QFN package with wettable flank