SLVSEM3D May   2020  – September 2021 TPS25850-Q1 , TPS25851-Q1 , TPS25852-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Switching Characteristics
    8. 8.8 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1  Power-Down or Undervoltage Lockout
      2. 10.3.2  Input Overvoltage Protection (OVP) - Continuously Monitored
      3. 10.3.3  Buck Converter
      4. 10.3.4  FREQ/SYNC
      5. 10.3.5  Bootstrap Voltage (BOOT)
      6. 10.3.6  Minimum ON-Time, Minimum OFF-Time
      7. 10.3.7  Internal Compensation
      8. 10.3.8  Selectable Output Voltage (VSET)
      9. 10.3.9  Current Limit and Short Circuit Protection
        1. 10.3.9.1 USB Switch Programmable Current Limit (ILIM)
        2. 10.3.9.2 Interlocking for Two-Level USB Switch Current Limit
        3. 10.3.9.3 Cycle-by-Cycle Buck Current Limit
        4. 10.3.9.4 OUT Current Limit
      10. 10.3.10 Cable Compensation
      11. 10.3.11 Thermal Management With Temperature Sensing (TS) and OTSD
      12. 10.3.12 Thermal Shutdown
      13. 10.3.13 USB Enable On/Off Control (TPS25852-Q1)
      14. 10.3.14 FAULT Indication (TPS25851-Q1 and TPS25852-Q1)
      15. 10.3.15 USB Specification Overview
      16. 10.3.16 USB Type-C® Basics
        1. 10.3.16.1 Configuration Channel
        2. 10.3.16.2 Detecting a Connection
        3. 10.3.16.3 Plug Polarity Detection (TPS25851-Q1)
      17. 10.3.17 USB Port Operating Modes
        1. 10.3.17.1 USB Type-C® Mode
        2. 10.3.17.2 Dedicated Charging Port (DCP) Mode (TPS25850-Q1 Only)
          1. 10.3.17.2.1 DCP BC1.2 and YD/T 1591-2009
          2. 10.3.17.2.2 DCP Divider-Charging Scheme
          3. 10.3.17.2.3 DCP 1.2-V Charging Scheme
        3. 10.3.17.3 DCP Auto Mode (TPS25850-Q1)
    4. 10.4 Device Functional Modes
      1. 10.4.1 Shutdown Mode
      2. 10.4.2 Active Mode
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Applications
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Output Voltage Setting
        2. 11.2.2.2 Switching Frequency
        3. 11.2.2.3 Inductor Selection
        4. 11.2.2.4 Output Capacitor Selection
        5. 11.2.2.5 Input Capacitor Selection
        6. 11.2.2.6 Bootstrap Capacitor Selection
        7. 11.2.2.7 Undervoltage Lockout Set-Point
        8. 11.2.2.8 Cable Compensation Set-Point
      3. 11.2.3 Application Curves
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
    3. 13.3 Ground Plane and Thermal Considerations
  14. 14Device and Documentation Support
    1. 14.1 Receiving Notification of Documentation Updates
    2. 14.2 Support Resources
    3. 14.3 Trademarks
    4. 14.4 Electrostatic Discharge Caution
    5. 14.5 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.3.9.1 USB Switch Programmable Current Limit (ILIM)

Because the TPS2585x-Q1 integrates two USB current-limit switches, it provides adjustable current limit to prevent USB port overheating. The device engages the two-level current limit scheme, which has one typical current limit, IOS_BUS, and the secondary current limit, IOS_HI. The secondary current limit, IOS_HI, is 1.6x the primary current limit, IOS_BUS. The secondary current limit acts as the current limit threshold for a deglitch time, tIOS_HI_DEG, then the USB power switch current limit threshold is set back to IOS_BUS. Equation 9 calculates the value of resistor for adjusting the typical current limit.

Equation 9. GUID-3AA6E5E8-C3E3-4239-8894-3402C4B2E8BC-low.gif

This equation assumes an ideal-no variation-external adjusting resistor. To take resistor tolerance into account, first determine the minimum and maximum resistor values based on its tolerance specifications and use these values in the equations. Because of the inverse relationship between the current limit and the adjusting resistor, use the maximum resistor value in the IOS(min) equation and the minimum resistor value in the IOS(max) equation. Typical RILIM resistor value are listed in Table 10-3.

Table 10-3 Setting the Current Limit with RILIM
RILIM (KΩ) IOS_BUS - Current Limit Threshold (mA)
19.1 1690
15.4 2096
11.5 2806
9.53 3386
Short to GND 3550

For the normal application, it can short the ILIM pin to GND directly, which sets a default 3.55-A current limit with a maximum ±15% variation on each USB port to follow the Type-C specification. The TPS2585x-Q1 provides built-in soft-start circuitry that controls the rising slew rate of the output voltage to limit inrush current and voltage surges.

The secondary current limit, IOS_HI, allows the USB port pull out a larger current for a short time during transient overload conditions, which can bring benefits for USB port special overload testing like MFi OCP. In a normal application, once the device is powered on and USB port is not in UVLO, the USB port current limit threshold is overridden by the secondary current limit, IOS_HI, so the USB port can output as high as a 1.6 × IOS_BUS current for typically 2 ms. After the deglitch time, tIOS_HI_DEG, the current limit threshold is set back to the typical current with IOS_BUS. The secondary current limit threshold does not resume until after the tIOS_HI_RST deglitch time, which is typically 16 ms. If there is an inrush current higher than the IOS_HI threshold, the current limit is set back to IOS_BUS immediately, without waiting for a tIOS_HI_DEG.

The TPS2585x-Q1 responds to overcurrent conditions by limiting output current to IOS_BUS as shown in previous equation. When an overload condition occurs, the device maintains a constant output current and the output voltage reduces accordingly. Three possible overload conditions can occur:

  • The first condition is when a short circuit or overload is applied to the USB output when the device is powered up or enabled. There can be inrush current and once it triggers the approximate 8-A threshold, a fast turnoff circuit is activated to turn off the USB power switch within tIOS_USB before the current limit control loop is able to respond (shown in Figure 10-11). After the fast turnoff is triggered, the USB power switch current-sense amplifier is over-driven during this time and momentarily disables the internal N-channel MOSFET to turn off USB port. The current-sense amplifier then recovers and ramps the output current with a soft start. If the USB port is still in overcurrent condition, the short circuit and overload hold the output near zero potential with respect to ground and the power switch ramps the output current to IOS_BUS. If the overcurrent limit condition lasts longer than 4.1 ms, the corresponding USB channel enters hiccup mode with 524 ms of off-time and 4.1 ms of on-time.
    GUID-20201005-CA0I-45LB-BD4V-X5PN7BB4CP4P-low.gif Figure 10-11 Response Time to BUS Short-Circuit
  • The second condition is the load current increases above IOS_BUS but below the IOS_HI setting. The device allows the USB port to output this large current for tIOS_HI_DEG, without limiting the USB port current to IOS_BUS. After the tIOS_HI_DEG deglitch time, the device limits the output current to IOS_BUS and works in a constant current-limit mode. If the load demands a current greater than IOS_BUS, the USB output voltage decreases to IOS_BUS × RLOAD for a resistive load, which is shown in Figure 10-12. If the overcurrent limit condition lasts longer than 4.1 ms, the corresponding USB channel enters hiccup mode with 524 ms of off-time and 4.1 ms of on-time. Another USB channel still works normally.
    GUID-20201005-CA0I-F8KL-ZHR9-HPTKCQN9DTPH-low.gif Figure 10-12 BUS Overcurrent Protection
  • The third condition is the load current increases just over the IOS_HI setting. In this case, the load current does not trigger the fast turnoff. The USB power switch current limit threshold is set back to the primary current limit, IOS_BUS, immediately. If the load still demands a current greater than IOS_BUS, the USB output voltage decreases to IOS_BUS × RLOAD for a resistive load, which is shown in Figure 10-13. If the overcurrent limit condition lasts longer than 4.1 ms, the corresponding USB channel enters hiccup mode with 524 ms of off-time and 4.1 ms of on-time. Another USB channel still works normally.
GUID-20201005-CA0I-BQ4Z-XS4F-RRWHCJVBFP75-low.gif Figure 10-13 BUS Overcurrent Protection: Two-Level Current Limit

The TPS2585x-Q1 thermal cycles if an overload condition is present long enough to activate thermal limiting in any of the previously mentioned cases. Thermal limiting turns off the internal NFET and starts when the NFET junction temperature exceeds 160°C (typical). The device remains off until the NFET junction temperature cools 10°C (typical) and then restarts. This extra thermal protection mechanism can help prevent further junction temperature rise, which can cause the device to turn off due to junction temperature exceeding the main thermal shutdown threshold, TSD.