SLVSF62B November   2020  – September 2021 TPS25858-Q1 , TPS25859-Q1

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Description (continued)
  6. 6 Device Comparison Table
  7. 7 Pin Configuration and Functions
  8. 8 Specifications
    1. 8.1 Absolute Maximum Ratings
    2. 8.2 ESD Ratings
    3. 8.3 Recommended Operating Conditions
    4. 8.4 Thermal Information
    5. 8.5 Electrical Characteristics
    6. 8.6 Timing Requirements
    7. 8.7 Switching Characteristics
    8. 8.8 Typical Characteristics
  9. 9 Parameter Measurement Information
  10. 10Detailed Description
    1. 10.1 Overview
    2. 10.2 Functional Block Diagram
    3. 10.3 Feature Description
      1. 10.3.1  Power-Down or Undervoltage Lockout
      2. 10.3.2  Input Overvoltage Protection (OVP) - Continuously Monitored
      3. 10.3.3  Buck Converter
      4. 10.3.4  FREQ/SYNC
      5. 10.3.5  Bootstrap Voltage (BOOT)
      6. 10.3.6  Minimum ON-Time, Minimum OFF-Time
      7. 10.3.7  Internal Compensation
      8. 10.3.8  Selectable Output Voltage (VSET)
      9. 10.3.9  Current Limit and Short Circuit Protection
        1. 10.3.9.1 USB Switch Programmable Current Limit (ILIM)
        2. 10.3.9.2 Interlocking for Two-Level USB Switch Current Limit
        3. 10.3.9.3 Cycle-by-Cycle Buck Current Limit
        4. 10.3.9.4 OUT Current Limit
      10. 10.3.10 Cable Compensation
      11. 10.3.11 Thermal Management With Temperature Sensing (TS) and OTSD
      12. 10.3.12 Thermal Shutdown
      13. 10.3.13 USB Enable On and Off Control (TPS25859-Q1)
      14. 10.3.14 FAULT Indication (TPS25859-Q1)
      15. 10.3.15 USB Specification Overview
      16. 10.3.16 USB Type-C® Basics
        1. 10.3.16.1 Configuration Channel
        2. 10.3.16.2 Detecting a Connection
      17. 10.3.17 USB Port Operating Modes
        1. 10.3.17.1 USB Type-C® Mode
        2. 10.3.17.2 Dedicated Charging Port (DCP) Mode (TPS25858-Q1 Only)
          1. 10.3.17.2.1 DCP BC1.2 and YD/T 1591-2009
          2. 10.3.17.2.2 DCP Divider-Charging Scheme
          3. 10.3.17.2.3 DCP 1.2-V Charging Scheme
        3. 10.3.17.3 DCP Auto Mode (TPS25858-Q1)
    4. 10.4 Device Functional Modes
      1. 10.4.1 Shutdown Mode
      2. 10.4.2 Active Mode
  11. 11Application and Implementation
    1. 11.1 Application Information
    2. 11.2 Typical Applications
      1. 11.2.1 Design Requirements
      2. 11.2.2 Detailed Design Procedure
        1. 11.2.2.1 Output Voltage Setting
        2. 11.2.2.2 Switching Frequency
        3. 11.2.2.3 Inductor Selection
        4. 11.2.2.4 Output Capacitor Selection
        5. 11.2.2.5 Input Capacitor Selection
        6. 11.2.2.6 Bootstrap Capacitor Selection
        7. 11.2.2.7 Undervoltage Lockout Set-Point
        8. 11.2.2.8 Cable Compensation Set-Point
      3. 11.2.3 Application Curves
  12. 12Power Supply Recommendations
  13. 13Layout
    1. 13.1 Layout Guidelines
    2. 13.2 Layout Example
    3. 13.3 Ground Plane and Thermal Considerations
  14. 14Device and Documentation Support
    1. 14.1 Receiving Notification of Documentation Updates
    2. 14.2 Support Resources
    3. 14.3 Trademarks
    4. 14.4 Electrostatic Discharge Caution
    5. 14.5 Glossary
  15. 15Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

10.3.11 Thermal Management With Temperature Sensing (TS) and OTSD

The TS input pin allows for user-programmable thermal protection (see the Electrical Characteristics for the TS pin thresholds). The TS input pin threshold is ratiometric with VSENSE. The external resistor divider setting, VTS, must be connected to the TPS2585x-Q1 SENSE pin to achieve accurate results (refer to the Figure 10-10). When VTS = 0.5 × VSENSE, the TPS2585x-Q1 performs the below action:

  • If operating with 3-A Type-C advertisement, the Px_CC1, Px_CC2 pin automatically reduces advertisement to the 1.5-A level.
GUID-CD66D6EF-CDED-4863-B1CD-F347B1291D68-low.gifFigure 10-10 TS Input

If the overtemperature condition persists, causing VTS = 0.65 × VSENSE, the TPS2585x-Q1 performs the below actions:

  • Broadcasts the Default USB Power mode. In Default USB Power, the charging is ideally reduced further per the USB2.0 and USB3.0 specification.
  • Buck regulator output voltage at the SENS pin is reduced to 4.77 V.

If the Overtemperature condition persists, causing TJ to reach the OTSD threshold, then the device thermal shuts down.Figure 10-11 shows the TPS25858-Q1 behavior when the TS pin voltage triggers the Temp Warm and Temp Hot threshold.

GUID-A11B2331-4965-465E-AB2E-3C0045D98648-low.gifFigure 10-11 TPS25858-Q1 Behavior When Trigger Temp Warm and Hot Threshold

The NTC thermistor must be placed near the hottest point on the PCB. In most cases, this is close to the SW node of the TPS2585x-Q1, near the buck inductor.

Tuning the VNTC threshold levels of VTEMP_WARM and VTEMP_HOT is achieved by adding RSER, RPARA, or both RSER and RPARA in conjunction with RNTC. Figure 10-12 is an example illustrating how to set the VTEMP_WARM threshold between 81°C and 90°C with a ΔT between TEMP_WARM assertion and TEMP_HOT assertion of 18°C to 29°C. Consult the chosen NTC manufacturer's specification for the value of β. Establishing the desired warning and shutdown thresholds can take some iteration.

Below is NTC spec and resistor value used in Figure 10-2 example.

  • R0 = 470 kΩ. β = 4750. RNTC = R0 × exp β × (1 / T – 1 / T0).
  • RPARA = 100 kΩ.
  • RSER = 5.1 kΩ.
  • RB = RNTC (at TEMP_WARM) = 27 kΩ.

GUID-A2258C17-4F98-4B80-8BB2-3ACBC15A5DFA-low.gifFigure 10-12 VTS Threshold Design Examples