The PCB layout of any bulk converter is critical
to the optimal performance of the design. Bad PCB
layout can disrupt the operation of an otherwise
good schematic design. Even if the converter
regulates correctly, bad PCB layout can mean the
difference between a robust design and one that
cannot be mass produced. Furthermore, the EMI
performance of the converter is dependent on the
PCB layout to a great extent. The following
guidelines will help users design a PCB with the
best power conversion performance, thermal
performance, and minimized generation of unwanted
EMI.
- The input bypass capacitor, CIN, must be placed as close as possible to
the IN and PGND pins. The high frequency ceramic bypass capacitors at the input
side provide a primary path for the high di/dt components of the pulsing
current. Use a wide VIN plane on a lower layer to connect both of the VIN pairs
together to the input supply. Grounding for both the input and output capacitors
must consist of localized top-side planes that connect to the PGND pin and
PAD.
- Use ground plane in one of the middle layers as noise shielding and heat dissipation path.
- Use wide traces for the CBOOT capacitor. Place the CBOOT
capacitor as close to the device with short, wide traces to the BOOT and SW
pins.
- The SW pin connecting to the inductor must be as short as possible, and just wide enough to carry the load current without excessive heating. Short, thick traces or copper pours (shapes) must be used for a high current conduction path to minimize parasitic resistance. The output capacitors must be placed close to the VSENSE end of the inductor and closely grounded to PGND pin and exposed PAD.
- RILIM and RFREQ resistors must be placed
as close as possible to the ILIM and FREQ pins and connected to AGND. If needed,
these components can be placed on the bottom side of the PCB with signals routed
through small vias, and the traces need far away from noisy nets like SW,
BOOT.
- Make VIN, VSENSE, and ground bus connections as wide as
possible. This action reduces any voltage drops on
the input or output paths of the converter and
maximizes efficiency.
- Provide enough PCB area for proper heat sinking. Enough copper area must be
used to ensure a low RθJA, commensurate
with the maximum load current and ambient
temperature. Make the top and bottom PCB layers
with 2-ounce copper; and no less than 1 ounce. If
the PCB design uses multiple copper layers
(recommended), thermal vias can also be connected
to the inner layer heat-spreading ground planes.
Note that the package of this device dissipates
heat through all pins. Wide traces must be used
for all pins except where noise considerations
dictate minimization of area.
- Use an array of heat-sinking vias to connect the exposed pad to the ground plane on the bottom PCB layer. If the PCB has multiple copper layers, these thermal vias can also be connected to inner layer heat-spreading ground planes. Ensure enough copper area is used for heat-sinking to keep the junction temperature below 150°C.
- Keep the CC lines close to the same length. Do not create stubs or test points on the CC lines.