SLVSFP1
August 2021
TPS25868-Q1
,
TPS25869-Q1
PRODUCTION DATA
1
Features
2
Applications
3
Description
4
Revision History
5
Description (continued)
6
Device Comparison Table
7
Pin Configuration and Functions
8
Specifications
8.1
Absolute Maximum Ratings
8.2
ESD Ratings
8.3
Recommended Operating Conditions
8.4
Thermal Information
8.5
Electrical Characteristics
8.6
Timing Requirements
8.7
Switching Characteristics
8.8
Typical Characteristics
9
Parameter Measurement Information
10
Detailed Description
10.1
Overview
10.2
Functional Block Diagram
10.3
Feature Description
10.3.1
Power-Down or Undervoltage Lockout
10.3.2
Input Overvoltage Protection (OVP) - Continuously Monitored
10.3.3
Buck Converter
10.3.4
FREQ/SYNC
10.3.5
Bootstrap Voltage (BOOT)
10.3.6
Minimum ON-Time, Minimum OFF-Time
10.3.7
Internal Compensation
10.3.8
Selectable Output Voltage (VSET)
10.3.9
Current Limit and Short Circuit Protection
10.3.9.1
USB Switch Programmable Current Limit (ILIM)
10.3.9.2
Interlocking for Two-Level USB Switch Current Limit
10.3.9.3
Cycle-by-Cycle Buck Current Limit
10.3.9.4
OUT Current Limit
10.3.10
Cable Compensation
10.3.11
Thermal Management with Temperature Sensing (TS) and OTSD
10.3.12
Thermal Shutdown
10.3.13
USB Enable On/Off Control (TPS25869-Q1)
10.3.14
FAULT Indication
10.3.15
USB Specification Overview
10.3.16
USB Type-C® Basics
10.3.16.1
Configuration Channel
10.3.16.2
Detecting a Connection
10.3.17
USB Port Operating Modes
10.3.17.1
USB Type-C® Mode
10.3.17.2
Dedicated Charging Port (DCP) Mode (TPS25868-Q1 Only)
10.3.17.2.1
DCP BC1.2 and YD/T 1591-2009
10.3.17.2.2
DCP Divider-Charging Scheme
10.3.17.2.3
DCP 1.2-V Charging Scheme
10.3.17.3
DCP Auto Mode (TPS25868-Q1)
10.4
Device Functional Modes
10.4.1
Shutdown Mode
10.4.2
Active Mode
11
Application and Implementation
11.1
Application Information
11.2
Typical Applications
11.2.1
Design Requirements
11.2.2
Detailed Design Procedure
11.2.2.1
Output Voltage Setting
11.2.2.2
Switching Frequency
11.2.2.3
Inductor Selection
11.2.2.4
Output Capacitor Selection
11.2.2.5
Input Capacitor Selection
11.2.2.6
Bootstrap Capacitor Selection
11.2.2.7
Undervoltage Lockout Set-Point
11.2.2.8
Cable Compensation Set-Point
11.2.2.9
FAULT Resistor Selection
11.2.3
Application Curves
12
Power Supply Recommendations
13
Layout
13.1
Layout Guidelines
13.2
Layout Example
13.3
Ground Plane and Thermal Considerations
14
Device and Documentation Support
14.1
Receiving Notification of Documentation Updates
14.2
Support Resources
14.3
Trademarks
14.4
Electrostatic Discharge Caution
14.5
Glossary
15
Mechanical, Packaging, and Orderable Information
Package Options
Mechanical Data (Package|Pins)
RPQ|25
MPQF555A
Thermal pad, mechanical data (Package|Pins)
Orderable Information
slvsfp1_oa
slvsfp1_pm
8.2
ESD Ratings
VALUE
UNIT
V
(ESD)
Electrostatic discharge
Human body model (HBM), per AEC Q100-002
(1)
±2000
(2)
V
Charged device model (CDM), per AEC Q100-011
Corner pins
±750
(3)
Other pins
±750
(3)
(1)
AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.
(2)
The passing level per AEC-Q100 Classification H2.
(3)
The passing level per AEC-Q100 Classification C5.