SLVSCU8 Data sheet

SLVSCU8E August 2015 – November 2017

PRODUCTION DATA.

Package Options

Mechanical Data (Package|Pins)

DRC|10
- MPDS117L

Thermal pad, mechanical data (Package|Pins)

DRC|10
- QFND013N

Orderable Information

6 Specifications

6.1 Absolute Maximum Ratings

over operating temperature range (unless otherwise noted) ⁽¹⁾ ⁽²⁾

		MIN	MAX	UNIT
VIN	Supply voltage⁽¹⁾	–0.3	20	V
VIN (10 ms Transient)	Supply voltage⁽¹⁾		22	V
OUT	Output voltage	–0.3	VIN + 0.3	V
OUT (Transient < 1 µs)	Output voltage		–1.2	V
ILIM	Voltage	–0.3	7	V
EN/UVLO		–0.3	7
dV/dT		–0.3	7
BFET		–0.3	30
	Transient junction temperature	–65	T_SHDN	°C
T_stg	Storage temperature	–65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values, except differential voltages, are with respect to network ground terminal.

6.2 ESD Ratings

			MAX	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged device model (CDM), per JEDEC specification JESD22-C101⁽²⁾	±500	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	TYP	MAX	UNIT
VIN	Input voltage	4.5		18⁽¹⁾	V
BFET		0		VIN+6
dV/dT, EN/UVLO		0		6
ILIM		0		3
I_OUT	Continuous output current	0		5	A
ILIM	Resistance	10	100	162	kΩ
OUT	External capacitance	0.1	1	1000	µF
dV/dT	External capacitance		1	1000	nF
T_J	Operating junction temperature	–40	25	125	°C
T_A	Operating Ambient temperature	–40	25	85	°C

(1) Maximum voltage (including input transients) at VIN pin must not exceed absolute maximum rating as specified in the Absolute Maximum Ratings table.

6.4 Thermal Information⁽¹⁾

over operating free-air temperature range (unless otherwise noted)

THERMAL METRIC		TPS25927x	UNIT
		DRC (VSON)
		10 PINS
R_θJA	Junction-to-ambient thermal resistance	45.9	°C/W
R_θJCtop	Junction-to-case (top) thermal resistance	53	°C/W
R_θJB	Junction-to-board thermal resistance	21.2	°C/W
ψ_JT	Junction-to-top characterization parameter	1.2	°C/W
ψ_JB	Junction-to-board characterization parameter	21.4	°C/W
R_θJCbot	Junction-to-case (bottom) thermal resistance	5.9	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

–40°C ≤ T_J ≤ +125°C, VIN = 12 V, V_EN _/UVLO = 2 V, R_ILIM = 100 kΩ, C_dVdT = OPEN. All voltages referenced to GND (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
VIN (INPUT SUPPLY)
V_UVR	UVLO threshold, rising		4.15	4.3	4.45	V
V_UVhyst	UVLO hysteresis⁽¹⁾			5%
IQ_ON	Supply current	Enabled: EN/UVLO = 2 V	0.3	0.42	0.55	mA
IQ_OFF	Supply current	EN/UVLO = 0 V		0.13	0.225	mA
EN/UVLO (ENABLE/UVLO INPUT)
V_ENR	EN threshold voltage, rising		1.37	1.4	1.44	V
V_ENF	EN threshold voltage, falling		1.32	1.35	1.39	V
I_EN	EN Input leakage current	0 V ≤ V_EN ≤ 5 V	–100	0	100	nA
dV/dT (OUTPUT RAMP CONTROL)
I_dVdT	dV/dT charging current⁽¹⁾	V_dVdT= 0 V		220		nA
R_{dVdT_disch}	dV/dT discharging resistance	EN/UVLO = 0 V, I_dVdT = 10 mA sinking	50	73	100	Ω
V_dVdTmax	dV/dT Max capacitor voltage⁽¹⁾			5.5		V
GAIN_dVdT	dV/dT to OUT gain⁽¹⁾	ΔV_dVdT		4.85		V/V
ILIM (CURRENT LIMIT PROGRAMMING)
I_ILIM	ILIM bias current⁽¹⁾			10		µA
I_OL	Overload current limit⁽²⁾	R_ILIM = 10 kΩ, V_{VIN – OUT} = 1 V		1.02		A
		R_ILIM = 45.3 kΩ, V_{VIN – OUT} = 1 V	1.79	2.10	2.42
		R_ILIM = 100 kΩ, V_{VIN – OUT} = 1 V	3.46	3.75	4.03
		R_ILIM = 150 kΩ, V_{VIN – OUT} = 1 V	4.5	5.1	5.7
I_OL-R-Short		R_ILIM = 0 Ω, shorted resistor current limit (single point failure test: UL60950)⁽¹⁾		0.84		A
I_OL-R-Open		R_ILIM= OPEN, open resistor current limit (single point failure test: UL60950)⁽¹⁾		0.73		A
I_SCL	Short-circuit current limit⁽²⁾	R_ILIM = 10 kΩ, V_{VIN – OUT} = 12 V		1		A
		R_ILIM = 45.3 kΩ, V_{VIN – OUT} = 12 V	1.66	1.98	2.37
		R_ILIM = 100 kΩ, V_{VIN – OUT} = 12 V	2.90	3.32	3.85
		R_ILIM = 150 kΩ, V_{VIN – OUT} = 12 V	3.7	4.5	5.5
RATIO_FASTRIP	Fast-trip comparator level w.r.t. overload current limit⁽¹⁾	I_FASTRIP : I_OL		160%
V_OpenILIM	ILIM open resistor detect threshold⁽¹⁾	V_ILIM Rising, R_ILIM= OPEN		3.1		V
OUT (PASS FET OUTPUT)
R_DS(on)	FET ON resistance	T_J = 25°C	21	28	37	mΩ
R_DS(on)	FET ON resistance	T_J= 125°C		39	48	mΩ
I_OUT-OFF-LKG	OUT Bias current in off state	V_EN/UVLO = 0 V, V_OUT = 0 V (sourcing)	–5	0	1.2	µA
I_OUT-OFF-SINK	OUT Bias current in off state	V_EN/UVLO = 0 V, V_OUT = 300 mV (sinking)	10	15	20	µA
BFET (BLOCKING FET GATE DRIVER)
I_BFET	BFET charging current⁽¹⁾	V_BFET = V_OUT		2		µA
V_BFETmax	BFET clamp voltage⁽¹⁾			V_VIN + 6.4		V
R_BFETdisch	BFET discharging resistance to GND	V_EN/UVLO = 0 V, I_BFET = 100 mA	15	26	36	Ω
TSD (THERMAL SHUT DOWN)
T_SHDN	TSD threshold, rising⁽¹⁾			150		°C
T_SHDNhyst	TSD hysteresis⁽¹⁾			10		°C
	Thermal fault: latched or auto-retry	TPS259270	Latched
	Thermal fault: latched or auto-retry	TPS259271	Auto-retry

(1) These parameters are provided for reference only and do not constitute part of TI's published device specifications for purposes of TI's product warranty.

(2) Pulsed testing techniques used during this test maintain junction temperature approximately equal to ambient temperature.

6.6 Timing Requirements

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
T_ON	Turnon delay⁽¹⁾	EN/UVLO → H to I_VIN= 100 mA, 1-A resistive load at OUT		220		µs
t_OFFdly	Turnoff delay⁽¹⁾	EN↓ to BFET↓, C_BFET = 0		0.4		µs
dV/dT (OUTPUT RAMP CONTROL)
t_dVdT	Output ramp time	EN/UVLO → H to OUT = 11.7 V, C_dVdT = 0	0.7	1	1.3	ms
t_dVdT	Output ramp time	EN/UVLO → H to OUT = 11.7 V, C_dVdT = 1 nF⁽¹⁾		12		ms
ILIM (CURRENT LIMIT PROGRAMMING)
t_FastOffDly	Fast-trip comparator delay⁽¹⁾	I_OUT > I_FASTRIP to I_OUT = 0 (Switch off)		300		ns
BFET (BLOCKING FET GATE DRIVER)
t_BFET-ON	BFET turnon duration⁽¹⁾	EN/UVLO → H to V_BFET = 12 V, C_BFET = 1 nF		4.2		ms
t_BFET-ON	BFET turnon duration⁽¹⁾	EN/UVLO → H to VB_FET = 12 V, C_BFET = 10 nF		42		ms
t_BFET-OFF	BFET Turnoff duration⁽¹⁾	EN/UVLO → L to _VBFET = 1 V, C_BFET = 1 nF		0.4		µs
t_BFET-OFF	BFET Turnoff duration⁽¹⁾	EN/UVLO → L to V_BFET= 1 V, C_BFET = 10 nF		1.4		µs
Thermal Shutdown (TSD)
t_TSDdly	Retry delay after TSD recovery, T_J < [T_SHDN – 10°C]⁽¹⁾	TPS259271 only		100		µs

(1) These parameters are provided for reference only and do not constitute part of TI's published device specifications for purposes of TI's product warranty.

6.7 Typical Characteristics

T_J = 25°C, V_VIN = 12 V, V_EN/UVLO = 2 V, R_ILIM = 100 kΩ, C_VIN = 0.1 µF, C_OUT = 1 µF, C_dVdT = OPEN (unless stated otherwise)

Figure 1. Input UVLO vs Temperature

Figure 3. I_VIN-ON vs V_IN

Figure 5. I_dVdT vs Temperature

TPS259270 TPS259271 C015_revB_SLVSC11.gif

Figure 7. V_EN-VIH, V_EN-VIL vs Temperature

Figure 9. R_DSON vs Temperature

TPS259270 TPS259271 C032_SLVSC11_CU8.gif

R_ILIM = 45.3 kΩ

Figure 11. I_OL, I_SC vs Temperature

TPS259270 TPS259271 C030_SLVSC11_CU8.gif

R_ILIM = 150 kΩ

Figure 13. I_OL, I_SC vs Temperature

TPS259270 TPS259271 C031_SLVSC11_CU8.gif

R_ILIM = 100 kΩ

Figure 15. I_OL, I_SC vs Temperature

R_ILIM= OPEN

Figure 17. I_OL-R-Open vs Temperature

Figure 19. V_OpenILIM vs Temperature

Figure 21. Thermal Shutdown Time vs Power Dissipation

TPS259270 TPS259271 fig43_revB_lvsc11.gif

TPS25927x, VIN = 18 V, C_dVdT = OPEN, C_OUT = 10 μF

Figure 23. Transient: Output Ramp

TPS259270 TPS259271 fig022_revB_SLVSC11.gif

EN ↓

Figure 25. Turnoff Delay to BFET

TPS259270 TPS259271 Fp_Fig_19_27_slvscu8.png

Figure 27. Transient: Output Short Circuit

TPS259270 TPS259271 fig38_revB2_lvsc11.gif

TPS259271

Figure 29. Transient: Recovery from Short Circuit-Over Current

TPS259270 TPS259271 fig40_revB2_lvsc11.gif

I_LOAD Stepped from 50% to 120%, Back to 50%

Figure 31. Transient: Overload Current Limit

TPS259270 TPS259271 fig42_revB2_lvsc11.gif

	TPS259270, VIN = 5 V

Figure 33. Transient: Thermal Fault Latched

Figure 2. I_Q-OFF vs V_IN

Figure 4. T_ON vs Temperature

Figure 6. T_dVdT vs C_dVdT

Figure 8. I_EN (Leakage Current) vs V_EN

R_ILIM = 45.3 kΩ

Figure 10. I_VOUT vs V_VIN-OUT

R_ILIM = 150 kΩ

Figure 12. I_VOUT vs V_VIN-OUT

R_ILIM = 100 kΩ

Figure 14. I_VOUT vs V_VIN-OUT

R_ILIM = 0 Ω

Figure 16. I_OL-R-Short vs Temperature

Figure 18. Overload Current Limit vs RILIM Resistor

Figure 20. Accuracy vs Overload Current Limit

TPS259270 TPS259271 fig17_revB2_lvsc11.gif

TPS25927x, C_dVdT = OPEN, C_OUT = 4.7 μF

Figure 22. Transient: Output Ramp

TPS259270 TPS259271 fig21_revB2_lvsc11.gif

EN ↓

Figure 24. Transient: Turnoff Delay

TPS259270 TPS259271 fig23_revB2_lvsc11.gif

VIN ↓

Figure 26. Turnoff Delay to BFET

Figure 28. Short Circuit (Zoom): Fast-Trip Comparator

TPS259270 TPS259271 fig39_revB2_lvsc11.gif

TPS259271

Figure 30. Transient: Wake Up to Short Circuit

TPS259271

Figure 32. Transient: Thermal Fault Auto-Retry