SLVSDJ0E May   2016  – January 2021 TPS25940-Q1

PRODMIX  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Typical Characteristics
  8. 8 Parametric Measurement Information
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Enable and Adjusting Undervoltage Lockout
      2. 9.3.2 Overvoltage Protection (OVP)
      3. 9.3.3 Hot Plug-In and In-Rush Current Control
      4. 9.3.4 Overload and Short Circuit Protection
        1. 9.3.4.1 Overload Protection
        2. 9.3.4.2 Short Circuit Protection
        3. 9.3.4.3 Start-Up with Short on Output
        4. 9.3.4.4 Constant Current Limit Behavior During Overcurrent Faults
      5. 9.3.5 FAULT Response
      6. 9.3.6 Current Monitoring
      7. 9.3.7 Power Good Comparator
      8. 9.3.8 IN, OUT and GND Pins
      9. 9.3.9 Thermal Shutdown
    4. 9.4 Device Functional Modes
      1. 9.4.1 DevSleep Mode
      2. 9.4.2 Shutdown Control
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
        1. 10.2.2.1 Step by Step Design Procedure
        2. 10.2.2.2 Programming the Current-Limit Threshold: R(ILIM) Selection
        3. 10.2.2.3 Undervoltage Lockout and Overvoltage Set Point
        4. 10.2.2.4 Programming Current Monitoring Resistor—RIMON
        5. 10.2.2.5 Setting Output Voltage Ramp Time (tdVdT)
          1. 10.2.2.5.1 Case1: Start-Up Without Load: Only Output Capacitance C(OUT) Draws Current During Start-Up
          2. 10.2.2.5.2 Case 2: Start-Up With Load: Output Capacitance C(OUT) and Load Draws Current During Start-Up
        6. 10.2.2.6 Programing the Power Good Set Point
        7. 10.2.2.7 Support Component Selections—R6, R7 and CIN
      3. 10.2.3 Application Curves
      4. 10.2.4 System Examples
        1. 10.2.4.1 VBUS Short-to-Battery, Short-to-Ground Protection of USB Port in Automotive Systems
        2. 10.2.4.2 Power Failure Protection for Holdup Power
        3. 10.2.4.3 Overload Detection Using TPS25940xx-Q1
  11. 11Power Supply Recommendations
    1. 11.1 Transient Protection
    2. 11.2 Output Short-Circuit Measurements
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Support Resources
    3. 13.3 Trademarks
    4. 13.4 Electrostatic Discharge Caution
    5. 13.5 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

9.4.1 DevSleep Mode

The TPS25940xx-Q1 device provides a dedicated DevSleep interface terminal (DEVSLP) to drive the device in low power mode. When pulled high, it puts the device in low power DevSleep mode. In this mode, the quiescent current consumption of the device is limited to less than 130 µA (95-µA typical). During this mode, the output voltage remains active, the overload current limit is set to I(DEVSLP(LIM)) and functionality of reverse comparator and current monitoring is disabled. All other protections are kept active ensuring the safety of the system even in DevSleep mode.

User must ensure that load currents on the bus are limited to less than I(DEVSLP(LIM)), when the device is driven to DevSleep mode. Also, while coming out of DevSleep, it is important to sequence the TPS25940xx-Q1 earlier than the load. Otherwise, the load can exceed I(DEVSLP(LIM)) and cause the TPS25940xx-Q1 to enter the overload mode.

Figure 9-4 through Figure 9-7 illustrate the behavior of the system in DevSleep mode.

GUID-2A872A01-3178-4224-98A8-847EB14E17F9-low.png
V(IN) = 12 Vl(LIM) = 5.3 ARL = 22 Ω
C(OUT) = 1 µF
Figure 9-4 IN and OUT of DevSleep Mode with 550-mA Load
GUID-5960A547-834C-49EC-A7B2-D154521A74B1-low.png
RL = 22 Ωl(LIM) = 5.3 AC(OUT) = 1 µF
Figure 9-6 IMON Disabled in DevSleep Mode
GUID-EDE871BD-FCAE-4D0C-AA8B-29E9E310E4EA-low.png
V(IN) = 12 Vl(LIM) = 5.3 ARL = 15 Ω
C(OUT) = 1 µF
Figure 9-5 IN and OUT of DevSleep Mode with 800-mA Load. In DevSleep, Load Current Gets Limited to I(DEVSLP(LIM))
GUID-68F5C69E-F9BE-44B7-9815-3497FDF345C1-low.png
l(LIM–) = 5.3 AC(OUT) = 1 µF
Figure 9-7 TPS25940-Q1/TPS259401A-Q1 Hot Short and Retry in DevSleep Mode