SLVSCE9D June 2014 – October 2017 TPS25942A , TPS25942L , TPS25944A , TPS25944L
UNLESS OTHERWISE NOTED, this document contains PRODUCTION DATA.
When load draws current during the turn-on sequence, there is additional power dissipated. Considering a resistive load RL(SU) during start-up, load current ramps up proportionally with increase in output voltage during tdVdT time. Typical ramp-up of output voltage, load current and power dissipated in the device is shown in Figure 58 and power dissipation with respect to time is plotted in Figure 59. The additional power dissipation during start-up phase is calculated as follows shown in Equation 18 and Equation 19.
Where RL(SU) is the load resistance present during start-up. Average energy loss in internal FET during charging time due to resistive load is given by Equation 20.
V(IN) = 12 V | C(dVdT) = 1 nF, C(OUT) = 100 µF | RL(SU) = 4.8 Ω |
V(IN) = 12 V | C(dVdT) = 1 nF, C(OUT) = 100 µF | RL(SU) = 4.8 Ω |
Solving Equation 20 the average power loss in the device due to load is given by Equation 21.
Total power dissipated in the device during start-up is given by Equation 22.
Total current during start-up is given by Equation 23.
If I(STARTUP) > I(LIM), the device limits the current to I(LIM) and the current limited charging time is determined by Equation 24.
The power dissipation, with and without load, for selected start-up time must not exceed the shutdown limits as shown in Figure 60.
For the design example under discussion,
Select ramp-up capacitor C(dVdT) = 1nF, using Equation 2, we get Equation 25.
The inrush current drawn by the load capacitance (C(OUT)) during ramp-up is calculated using Equation 3 and Equation 26.
The inrush Power dissipation is calculated, using Equation 17 and Equation 27.
For 7.2 W of power loss, the thermal shut down time of the device must not be less than the ramp-up time tdVdT to avoid the false trip at maximum operating temperature. From thermal shutdown limit graph Figure 60 at TA = 85°C, for 7.2 W of power the shutdown time is approximately 60 ms. So it is safe to use 1 ms as start-up time without any load on output.
Considering the start-up with load 4.8 Ω, the additional power dissipation, when load is present during start-up is calculated, using Equation 21 and Equation 28.
The total device power dissipation during start up is given by Equation 29.
From thermal shutdown limit graph at TA = 85°C, the thermal shutdown time for 12.2 W is close to 7.5 ms. It is safe to have 30% margin to allow for variation of system parameters such as load, component tolerance, and input voltage. So it is well within acceptable limits to use the 1 nF capacitor with start-up load of 4.8 Ω.
If there is a need to decrease the power loss during start-up, it can be done with increase of C(dVdT) capacitor.
To illustrate, choose C(dVdT) = 1.5 nF as an option and recalculate as shown in Equation 30 to Equation 34.
From thermal shutdown limit graph at TA = 85°C, the shutdown time for 10 W power dissipation is approximately 17 ms, which increases the margins further for shutdown time and ensures successful operation during start-up and steady state conditions.
The spreadsheet tool available on the web can be used for iterative calculations.