SLVSGT9B February   2023  – June 2024 TPS25948

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Device Comparison Table
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1 Absolute Maximum Ratings
    2. 6.2 ESD Ratings
    3. 6.3 Recommended Operating Conditions
    4. 6.4 Thermal Information
    5. 6.5 Electrical Characteristics
    6. 6.6 Timing Requirements
    7. 6.7 Switching Characteristics
    8. 6.8 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Undervoltage Lockout (UVLO and UVP)
      2. 7.3.2 Overvoltage Lockout (OVLO)
      3. 7.3.3 Inrush Current, Overcurrent, and Short Circuit Protection
        1. 7.3.3.1 Slew Rate (dVdt) and Inrush Current Control
        2. 7.3.3.2 Active Current Limiting
        3. 7.3.3.3 Short-Circuit Protection
      4. 7.3.4 Analog Load Current Monitor
      5. 7.3.5 Reverse Current Protection
      6. 7.3.6 Overtemperature Protection (OTP)
      7. 7.3.7 Fault Response and Indication (FLT)
      8. 7.3.8 Supply Good Indication (SPLYGD/SPLYGD)
    4. 7.4 Device Functional Modes
  9. 8 Application and Implementation
    1. 8.1 Application Information
    2. 8.2 Single Device, Self-Controlled
    3. 8.3 Typical Application
      1. 8.3.1 Design Requirements
      2. 8.3.2 Detailed Design Procedure
        1. 8.3.2.1 Setting Overvoltage Threshold
        2. 8.3.2.2 Setting Output Voltage Rise Time (tR)
        3. 8.3.2.3 Setting Overcurrent Threshold (ILIM)
        4. 8.3.2.4 Setting Overcurrent Blanking Interval (tITIMER)
      3. 8.3.3 Application Curves
    4. 8.4 Active ORing
    5. 8.5 Priority Power MUXing
    6. 8.6 Parallel Operation
    7. 8.7 USB PD Port Protection
    8. 8.8 Power Supply Recommendations
      1. 8.8.1 Transient Protection
      2. 8.8.2 Output Short-Circuit Measurements
    9. 8.9 Layout
      1. 8.9.1 Layout Guidelines
      2. 8.9.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.6 Parallel Operation

Applications which need higher steady current can use 2 or more TPS25948x devices connected in parallel as shown in Figure 8-19. In this configuration, the first device turns on initially to provide the inrush current limiting. The second device is held in an OFF state by driving its EN/UVLO pin low using the SPLYGD signal of the first device. Once the inrush sequence is complete, the first device asserts its SPLYGD pin high and turns on the second device. The second device asserts its SPLYGD signal to indicate when it has turned on fully, thereby indicating to the system that the parallel combination is ready to deliver the full steady state current.

Once in steady state, both devices share current nearly equally. There could be a slight skew in the currents depending on the part-to-part variation in the RON as well as the PCB trace resistance mismatch.

TPS25948 Two Devices Connected in Parallel for Higher Steady State Current CapabilityFigure 8-19 Two Devices Connected in Parallel for Higher Steady State Current Capability

The following waveforms illustrate the behavior of parallel configuration during start-up as well as during steady state.

TPS25948 Parallel Devices Sequencing During Start-UpFigure 8-20 Parallel Devices Sequencing During Start-Up
TPS25948 Parallel Devices Load Current During Steady StateFigure 8-21 Parallel Devices Load Current During Steady State