SLVSET8A May   2019  – August 2019 TPS2596

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
    1.     Device Images
      1.      Simplified Schematic
      2.      TPS25963x 1KV EFT Response
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
    1.     Pin Functions
  7. 7 Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Timing Requirements
    7. 7.7 Switching Characteristics
    8. 7.8 Typical Characteristics
  8. 8 Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 Undervoltage Protection (UVP) and Undervoltage Lockout (UVLO)
      2. 8.3.2 Overvoltage Protection
        1. 8.3.2.1 Overvoltage Lockout
        2. 8.3.2.2 Overvoltage Clamp
      3. 8.3.3 Inrush Current, Overcurrent and Short Circuit Protection
        1. 8.3.3.1 Slew Rate and Inrush Current Control (dVdt)
        2. 8.3.3.2 Active Current Limiting
        3. 8.3.3.3 Short-Circuit Protection
      4. 8.3.4 Analog Load Current Monitor (IMON)
      5. 8.3.5 Overtemperature Protection (OTP)
      6. 8.3.6 Fault Indication
    4. 8.4 Device Functional Modes
      1. 8.4.1 Enable and Fault Pin Functional Mode 1: Single Device, Self-Controlled
      2. 8.4.2 Enable and Fault Pin Functional Mode 2: Single Device, Host-Controlled
      3. 8.4.3 Enable and Fault Pin Functional Mode 3: Multiple Devices, Self-Controlled
  9. 9 Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Precision Current Limiting and Protection for White Goods
      2. 9.2.2 Design Requirements
      3. 9.2.3 Detailed Design Procedure
        1. 9.2.3.1 Programming the Current-Limit Threshold: RILM Selection
        2. 9.2.3.2 Undervoltage and Overvoltage Lockout Set Point
        3. 9.2.3.3 Setting Output Voltage Ramp Time (TdVdT)
          1. 9.2.3.3.1 Case 1: Start-Up Without Load. Only Output Capacitance COUT Draws Current
          2. 9.2.3.3.2 Case 2: Start-Up With Load. Output Capacitance COUT and Load Draw Current
      4. 9.2.4 Support Component Selection: RFLT and CIN
      5. 9.2.5 Application Curves
    3. 9.3 System Examples
      1. 9.3.1 Current Limiting and Overvoltage Protection and for Energy Meter Power Rails
      2. 9.3.2 Precision Current Limiting and Protection in Appliances
  10. 10Power Supply Recommendations
    1. 10.1 Transient Protection
    2. 10.2 Output Short-Circuit Measurements
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12Device and Documentation Support
    1. 12.1 Documentation Support
      1. 12.1.1 Related Documentation
    2. 12.2 Receiving Notification of Documentation Updates
    3. 12.3 Community Resources
    4. 12.4 Trademarks
    5. 12.5 Electrostatic Discharge Caution
    6. 12.6 Glossary
  13. 13Mechanical, Packaging, and Orderable Information

Package Options

Mechanical Data (Package|Pins)
Thermal pad, mechanical data (Package|Pins)
Orderable Information

8.3.1 Undervoltage Protection (UVP) and Undervoltage Lockout (UVLO)

TPS2596xx constantly monitors the input supply to ensure that the load is powered up only when the voltage is at a sufficient level. During the start-up condition, the device waits for the input supply to rise above an internal fixed threshold VUVP(R) before it proceeds to turn ON the FET. Similarly, during the ON condition, if the input supply falls below the UVP threshold VUVP(F), the FET is turned OFF. The UVP rising and falling thresholds are slightly different, thereby providing some hysteresis and ensuring stable operation around the threshold voltage.

The TPS2596xx devices also provide an user adjustable UVLO mechanism to ensure that the load is powered up only when the voltage is at a sufficient level. This can be achieved by dividing the input supply and feeding it to the EN/UVLO pin. Whenever the voltage at the EN/UVLO pin falls below a threshold VUVLO(F), the device turns OFF the FET. The FET is turned ON again when the voltage rises above the threshold VUVLO(R). The rising and falling thresholds on this pin are slightly different, thereby providing some hysteresis and ensuring stable operation around the threshold voltage.

The user must choose the resistor divider values appropriately to map the desired input undervoltage level to the UVLO threshold of the part.

TPS2596 Circuit-ENUVLO-connection.gifFigure 44. Adjustable Undervoltage Lockout
Equation 1. TPS2596 Equation-UVLO.gif